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[23.128.96.18]) by mx.google.com with ESMTP id b3si635436ejz.322.2020.10.23.04.23.05; Fri, 23 Oct 2020 04:23:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Yb+qgd3f; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S462878AbgJWLV6 (ORCPT + 99 others); Fri, 23 Oct 2020 07:21:58 -0400 Received: from mail.kernel.org ([198.145.29.99]:39020 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S462857AbgJWLV5 (ORCPT ); Fri, 23 Oct 2020 07:21:57 -0400 Received: from willie-the-truck (236.31.169.217.in-addr.arpa [217.169.31.236]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B2AAC207BB; Fri, 23 Oct 2020 11:21:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603452116; bh=Q6EJmyqOf5tfjZLlhH9Oj+yDC1RmgGtXR6z9A920tEg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Yb+qgd3fCLrqV+aHUHGJYDg7C+r0yjseSv5PVATRi+wMwUB+1hSavsi7MbzibCDq5 tPJJRtCDQITBgw8ZrYT3Ci85G2m8k3Mf8golIIWK1mnoHp9BLfgHYgzO1PWCkYj49/ WwBTs0VMggQ92LKsSkWQ9nivsF8U3CeHVgZQ/EQ8= Date: Fri, 23 Oct 2020 12:21:49 +0100 From: Will Deacon To: Yong Wu Cc: Joerg Roedel , Matthias Brugger , Rob Herring , Robin Murphy , Krzysztof Kozlowski , Evan Green , Tomasz Figa , linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, youlin.pei@mediatek.com, Nicolas Boichat , anan.sun@mediatek.com, chao.hao@mediatek.com, ming-fan.chen@mediatek.com, Greg Kroah-Hartman , kernel-team@android.com Subject: Re: [PATCH v3 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Message-ID: <20201023112148.GB20933@willie-the-truck> References: <20200930070647.10188-1-yong.wu@mediatek.com> <20200930070647.10188-12-yong.wu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200930070647.10188-12-yong.wu@mediatek.com> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 30, 2020 at 03:06:34PM +0800, Yong Wu wrote: > The standard input iova bits is 32. MediaTek quad the lvl1 pagetable > (4 * lvl1). No change for lvl2 pagetable. Then the iova bits can reach > 34bit. > > Signed-off-by: Yong Wu > --- > drivers/iommu/io-pgtable-arm-v7s.c | 13 ++++++++++--- > drivers/iommu/mtk_iommu.c | 2 +- > 2 files changed, 11 insertions(+), 4 deletions(-) > > diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c > index 8362fdf76657..306bae2755ed 100644 > --- a/drivers/iommu/io-pgtable-arm-v7s.c > +++ b/drivers/iommu/io-pgtable-arm-v7s.c > @@ -50,10 +50,17 @@ > */ > #define ARM_V7S_ADDR_BITS 32 If we rename this to _ARM_V7S_ADDR_BITS can we then have ARM_V7S_ADDR_BITS take a cfg parameter and move the arm_v7s_is_mtk_enabled() check in there? Same for _ARM_V7S_LVL_BITS. That would avoid scattering arm_v7s_is_mtk_enabled() into all the users. Will