Received: by 2002:a05:6a10:6744:0:0:0:0 with SMTP id w4csp621487pxu; Fri, 23 Oct 2020 09:09:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzAUTVLEGkNlG86eQSI0+EHtmAiCr6ZjrdAvgvQnKDWURbxeXsbBPrLupgOWLRlJAB/OL4F X-Received: by 2002:a50:8d48:: with SMTP id t8mr3030328edt.228.1603469389508; Fri, 23 Oct 2020 09:09:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1603469389; cv=none; d=google.com; s=arc-20160816; b=XyANu0OAypWXaQfXlg7j82nRXVrRlD/d72AIFAkQRu1TTBSnJXvxql/NRPOp7Gj46Z c2y2pADPnn6g1IRUFU6oxQlRf6Sln6geA0lJ7UlEqXnz8Knt5/XRid8pTBnEmpl91Fs2 6C5tjnXni6oU48bA0InKdz1RNhLPXHJc2ACeBF3jKwWiGDZ/o8sXItnBtXBzx+5buNI4 n2XbOXdbmq+q3rdzctPuj8zzNO+XqbllU85DQ6uBO3s64F4/VKFLXlulfhTpF5ME62ms fbgZATCzbaS0gD6OMdLY8aqbwBVBezyfIljX1+QRtNQVxmM9wzEEsGglNIG7N5QnB4vt PXIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=YLba9kEyuswjqrTSkWtYOZK0bdpU1WuZi6MW+HcL7k8=; b=Cvusd6YLvXWUk0U42VJPRvR/IzjeuDdKvmc3U40/pdRjwmLVFEQoQeYiOUYKaP/sAG ZGVFYWlg14eWthvPqkpah01Npl/l6fgN2PzFYVFngUaEDL7Jrag4dCfAWUI9fmb0zmTG I/FtNGqi3vXqP2gYiqZyzpIDPJYFa8vFpA7rMLADaZEFJf91wgsMq+0gcPoSn/IqHmce 2wlnWxL5WtJQtw/3trTFhvbQeaHDl7noFtWnG0Whawk3jEnQibMar0y5JXZrvaP4E3nf s3VdCfYdPmdJsQfz4y1VzxQXVqdTyOIEvGqpRgYI385Du6elEAyCm11dse0L71i3E9fb wHwA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dn1si1127923edb.319.2020.10.23.09.09.25; Fri, 23 Oct 2020 09:09:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S465150AbgJWNz1 (ORCPT + 99 others); Fri, 23 Oct 2020 09:55:27 -0400 Received: from foss.arm.com ([217.140.110.172]:53306 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S464793AbgJWNz0 (ORCPT ); Fri, 23 Oct 2020 09:55:26 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6F80D113E; Fri, 23 Oct 2020 06:55:25 -0700 (PDT) Received: from bogus (unknown [10.57.15.80]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3283E3F66B; Fri, 23 Oct 2020 06:55:24 -0700 (PDT) Date: Fri, 23 Oct 2020 14:55:21 +0100 From: Sudeep Holla To: Rob Herring Cc: "linux-kernel@vger.kernel.org" , devicetree@vger.kernel.org, linux-arm-kernel , Viresh Kumar , Sudeep Holla Subject: Re: [PATCH 1/2] dt-bindings: arm,scmi: Do not use clocks for SCMI performance domains Message-ID: <20201023135521.pjv3ctpxrsg4z2oz@bogus> References: <20201020203710.10100-1-sudeep.holla@arm.com> <20201021163021.lkqhum3xnyzt6pir@bogus> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20171215 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 23, 2020 at 08:21:21AM -0500, Rob Herring wrote: > On Wed, Oct 21, 2020 at 11:30 AM Sudeep Holla wrote: > > > > On Wed, Oct 21, 2020 at 11:20:27AM -0500, Rob Herring wrote: > > > On Tue, Oct 20, 2020 at 3:37 PM Sudeep Holla wrote: > > > > > > > > Commit dd461cd9183f ("opp: Allow dev_pm_opp_get_opp_table() to return > > > > -EPROBE_DEFER") handles -EPROBE_DEFER for the clock/interconnects within > > > > _allocate_opp_table() which is called from dev_pm_opp_add and it > > > > now propagates the error back to the caller. > > > > > > > > SCMI performance domain re-used clock bindings to keep it simple. However > > > > with the above mentioned change, if clock property is present in a device > > > > node, opps can't be added until clk_get succeeds. So in order to fix the > > > > issue, we can register dummy clocks which is completely ugly. > > > > > > > > Since there are no upstream users for the SCMI performance domain clock > > > > bindings, let us introduce separate performance domain bindings for the > > > > same. > > > > > > > > Signed-off-by: Sudeep Holla > > > > --- > > > > .../devicetree/bindings/arm/arm,scmi.txt | 19 ++++++++++++++++--- > > > > 1 file changed, 16 insertions(+), 3 deletions(-) > > > > > > > > Hi Rob/Viresh, > > > > > > > > This is actually a fix for the regression I reported here[1]. > > > > I am not adding fixes tag as I am targeting in the same release and > > > > also because it is not directly related. > > > > > > > > Regards, > > > > Sudeep > > > > > > > > [1] https://lore.kernel.org/r/20201015180555.gacdzkofpibkdn2e@bogus > > > > > > > > P.S.:/me records that this binding needs to be moved to yaml in v5.11 > > > > > > > > diff --git a/Documentation/devicetree/bindings/arm/arm,scmi.txt b/Documentation/devicetree/bindings/arm/arm,scmi.txt > > > > index 55deb68230eb..0a6c1b495403 100644 > > > > --- a/Documentation/devicetree/bindings/arm/arm,scmi.txt > > > > +++ b/Documentation/devicetree/bindings/arm/arm,scmi.txt > > > > @@ -44,7 +44,7 @@ as described in the following sections. If the platform supports dedicated > > > > mboxes, mbox-names and shmem shall be present in the sub-node corresponding > > > > to that protocol. > > > > > > > > -Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol > > > > +Clock bindings for the clocks based on SCMI Message Protocol > > > > ------------------------------------------------------------ > > > > > > > > This binding uses the common clock binding[1]. > > > > @@ -52,6 +52,19 @@ This binding uses the common clock binding[1]. > > > > Required properties: > > > > - #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands. > > > > > > > > +Performance bindings for the OPPs based on SCMI Message Protocol > > > > +------------------------------------------------------------ > > > > + > > > > +Required properties: > > > > +- #perf-domain-cells: Should be 1. Contains the performance domain ID value > > > > + used by SCMI commands. > > > > > > When is this not 1 (IOW, you only need this if variable)? How would it > > > be used outside SCMI (given it has a generic name)? > > > > > > > Ah, I thought we need this if phandle is followed by 1 or more arguments. > > If it is not compulsory I can drop this or make it scmi specific if we > > need it. > > No, your options are fixed or variable number of cells. If this is > generic, then maybe it needs to be variable. If it's SCMI specific > then it can likely be fixed unless you can think of other information > you may need in the cells. > Understood. > > > > + > > > > +* Property arm,scmi-perf-domain > > > > > > Yet this doesn't have a generic name. You mentioned on IRC this is > > > aligned with QCom, but why can't QCom use the same property here? > > > > > > > This is SCMI firmware driven while they have hardware driven perf/freq > > domains. So different drivers, need to distinguish between the two. > > So what if they are different drivers. That's *always* the case. The > clock provider(s) for 'clocks' is different for every SoC? I doesn't > matter who is the provider, it's the same information being described. > Fair enough. I was basing my argument on the fact that Qcom has users for those bindings and I see limited scope for consolidation as that binding has more information about the cpufreq-hw hardware block. -- Regards, Sudeep