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charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Fabien: Fabien Parent =E6=96=BC 2020=E5=B9=B410=E6=9C=8823= =E6=97=A5 =E9=80=B1=E4=BA=94 =E4=B8=8B=E5=8D=889:31=E5=AF=AB=E9=81=93=EF=BC= =9A > > Add the main (DSI) drm display path for MT8167. > > Signed-off-by: Fabien Parent > --- > > Changelog: > > V2: No change > > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 38 ++++++++++++++++++++++++++ > 1 file changed, 38 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/med= iatek/mtk_drm_drv.c > index 59c85c63b7cc..3952435093fe 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > @@ -112,6 +112,17 @@ static const enum mtk_ddp_comp_id mt2712_mtk_ddp_thi= rd[] =3D { > DDP_COMPONENT_PWM2, > }; > > +static enum mtk_ddp_comp_id mt8167_mtk_ddp_main[] =3D { > + DDP_COMPONENT_OVL0, > + DDP_COMPONENT_COLOR0, > + DDP_COMPONENT_CCORR, > + DDP_COMPONENT_AAL0, > + DDP_COMPONENT_GAMMA, > + DDP_COMPONENT_DITHER, > + DDP_COMPONENT_RDMA0, > + DDP_COMPONENT_DSI0, > +}; > + > static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] =3D { > DDP_COMPONENT_OVL0, > DDP_COMPONENT_COLOR0, > @@ -163,6 +174,11 @@ static const struct mtk_mmsys_driver_data mt8173_mms= ys_driver_data =3D { > .ext_len =3D ARRAY_SIZE(mt8173_mtk_ddp_ext), > }; > > +static const struct mtk_mmsys_driver_data mt8167_mmsys_driver_data =3D { > + .main_path =3D mt8167_mtk_ddp_main, > + .main_len =3D ARRAY_SIZE(mt8167_mtk_ddp_main), > +}; > + > static int mtk_drm_kms_init(struct drm_device *drm) > { > struct mtk_drm_private *private =3D drm->dev_private; > @@ -401,26 +417,42 @@ static const struct component_master_ops mtk_drm_op= s =3D { > static const struct of_device_id mtk_ddp_comp_dt_ids[] =3D { > { .compatible =3D "mediatek,mt2701-disp-ovl", > .data =3D (void *)MTK_DISP_OVL }, > + { .compatible =3D "mediatek,mt8167-disp-ovl", > + .data =3D (void *)MTK_DISP_OVL }, > { .compatible =3D "mediatek,mt8173-disp-ovl", > .data =3D (void *)MTK_DISP_OVL }, > { .compatible =3D "mediatek,mt2701-disp-rdma", > .data =3D (void *)MTK_DISP_RDMA }, > + { .compatible =3D "mediatek,mt8167-disp-rdma", > + .data =3D (void *)MTK_DISP_RDMA }, > { .compatible =3D "mediatek,mt8173-disp-rdma", > .data =3D (void *)MTK_DISP_RDMA }, > { .compatible =3D "mediatek,mt8173-disp-wdma", > .data =3D (void *)MTK_DISP_WDMA }, > + { .compatible =3D "mediatek,mt8167-disp-ccorr", > + .data =3D (void *)MTK_DISP_CCORR }, > { .compatible =3D "mediatek,mt2701-disp-color", > .data =3D (void *)MTK_DISP_COLOR }, > + { .compatible =3D "mediatek,mt8167-disp-color", > + .data =3D (void *)MTK_DISP_COLOR }, > { .compatible =3D "mediatek,mt8173-disp-color", > .data =3D (void *)MTK_DISP_COLOR }, > + { .compatible =3D "mediatek,mt8167-disp-aal", > + .data =3D (void *)MTK_DISP_AAL}, > { .compatible =3D "mediatek,mt8173-disp-aal", > .data =3D (void *)MTK_DISP_AAL}, > + { .compatible =3D "mediatek,mt8167-disp-gamma", > + .data =3D (void *)MTK_DISP_GAMMA, }, > { .compatible =3D "mediatek,mt8173-disp-gamma", > .data =3D (void *)MTK_DISP_GAMMA, }, > + { .compatible =3D "mediatek,mt8167-disp-dither", > + .data =3D (void *)MTK_DISP_DITHER }, > { .compatible =3D "mediatek,mt8173-disp-ufoe", > .data =3D (void *)MTK_DISP_UFOE }, > { .compatible =3D "mediatek,mt2701-dsi", > .data =3D (void *)MTK_DSI }, > + { .compatible =3D "mediatek,mt8167-dsi", > + .data =3D (void *)MTK_DSI }, > { .compatible =3D "mediatek,mt8173-dsi", > .data =3D (void *)MTK_DSI }, > { .compatible =3D "mediatek,mt2701-dpi", > @@ -431,10 +463,14 @@ static const struct of_device_id mtk_ddp_comp_dt_id= s[] =3D { > .data =3D (void *)MTK_DISP_MUTEX }, > { .compatible =3D "mediatek,mt2712-disp-mutex", > .data =3D (void *)MTK_DISP_MUTEX }, > + { .compatible =3D "mediatek,mt8167-disp-mutex", > + .data =3D (void *)MTK_DISP_MUTEX }, > { .compatible =3D "mediatek,mt8173-disp-mutex", > .data =3D (void *)MTK_DISP_MUTEX }, > { .compatible =3D "mediatek,mt2701-disp-pwm", > .data =3D (void *)MTK_DISP_BLS }, > + { .compatible =3D "mediatek,mt8167-disp-pwm", > + .data =3D (void *)MTK_DISP_PWM }, > { .compatible =3D "mediatek,mt8173-disp-pwm", > .data =3D (void *)MTK_DISP_PWM }, > { .compatible =3D "mediatek,mt8173-disp-od", > @@ -449,6 +485,8 @@ static const struct of_device_id mtk_drm_of_ids[] =3D= { > .data =3D &mt7623_mmsys_driver_data}, > { .compatible =3D "mediatek,mt2712-mmsys", > .data =3D &mt2712_mmsys_driver_data}, > + { .compatible =3D "mediatek,mt8167-mmsys", This patch looks good to me, but it depend on another patch which define the compatible "mediatek,mt8167-mmsys". Where is that patch? Regards, Chun-Kuang. > + .data =3D &mt8167_mmsys_driver_data}, > { .compatible =3D "mediatek,mt8173-mmsys", > .data =3D &mt8173_mmsys_driver_data}, > { } > -- > 2.28.0 >