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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.gmail.com with ESMTPSA id p21sm4586588wmc.28.2020.10.23.10.43.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Oct 2020 10:43:18 -0700 (PDT) To: Jim Mattson Cc: Sean Christopherson , Mohammed Gamal , kvm list , LKML , Vitaly Kuznetsov , Wanpeng Li , Joerg Roedel References: <20200710154811.418214-1-mgamal@redhat.com> <20200710154811.418214-8-mgamal@redhat.com> <20201023031433.GF23681@linux.intel.com> <498cfe12-f3e4-c4a2-f36b-159ccc10cdc4@redhat.com> From: Paolo Bonzini Subject: Re: [PATCH v3 7/9] KVM: VMX: Add guest physical address check in EPT violation and misconfig Message-ID: <4463f391-0a25-017e-f913-69c297e13c5e@redhat.com> Date: Fri, 23 Oct 2020 19:43:18 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.3.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/10/20 19:23, Jim Mattson wrote: >> The information that we need is _not_ that provided by the advanced >> VM-exit information (or by a page walk). If a page is neither writable >> nor executable, the advanced information doesn't say if the injected #PF >> should be a W=1 or a F=1 fault. We need the information in bits 0..2 of >> the exit qualification for the final access, which however is not >> available for the paging-structure access. >> > Are you planning to extend the emulator, then, to support all > instructions? I'm not sure where you are going with this. I'm going to fix the bit 8=1 case, but for bit 8=0 there's not much that you can do. In all likelihood the guest is buggy anyway. It would be possible to only do the decode part of the emulator to get the PFEC (matching the GVA from the vmexit to the memory operand, for example, and retrying if the instruction is unexpected). Then one would only need enough VEX/EVEX parsing to process the decoding. Paolo