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Fri, 23 Oct 2020 23:16:13 -0700 (PDT) Received: from localhost ([2001:e42:102:1532:160:16:113:140]) by smtp.gmail.com with ESMTPSA id nm11sm4927910pjb.24.2020.10.23.23.16.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2020 23:16:12 -0700 (PDT) From: Coiby Xu To: linux-gpio@vger.kernel.org Cc: Linus Walleij , Hans de Goede , linux-kernel@vger.kernel.org (open list) Subject: [PATCH] pinctrl: amd: print debounce filter info in debugfs Date: Sat, 24 Oct 2020 14:15:52 +0800 Message-Id: <20201024061552.4497-1-coiby.xu@gmail.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Print out the status of debounce filter as follows, $ cat /sys/kernel/debug/gpio|grep pin130 pin130 interrupt is disabled| interrupt is masked| disable wakeup in S0i3 state| disable wakeup in S3 state| disable wakeup in S4/S5 state| input is high| pull-up is disabled| Pull-down is disabled| output is disabled| debouncing filter (high) enabled| debouncing timeout is 124800 (us)| 0x503c8 Signed-off-by: Coiby Xu --- drivers/pinctrl/pinctrl-amd.c | 43 +++++++++++++++++++++++++++++++++-- 1 file changed, 41 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 9a760f5cd7ed..9897f86b1bec 100644 --- a/drivers/pinctrl/pinctrl-amd.c +++ b/drivers/pinctrl/pinctrl-amd.c @@ -197,10 +197,16 @@ static int amd_gpio_set_config(struct gpio_chip *gc, unsigned offset, static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc) { u32 pin_reg; + u32 reg_db_mask; unsigned long flags; unsigned int bank, i, pin_num; struct amd_gpio *gpio_dev = gpiochip_get_data(gc); + bool tmr_out_unit; + unsigned int time; + unsigned int unit; + bool tmr_large; + char *level_trig; char *active_level; char *interrupt_enable; @@ -214,6 +220,8 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc) char *pull_down_enable; char *output_value; char *output_enable; + char debounce_value[40]; + char *debounce_enable; for (bank = 0; bank < gpio_dev->hwbank_num; bank++) { seq_printf(s, "GPIO bank%d\t", bank); @@ -327,13 +335,44 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc) pin_sts = "input is low|"; } + reg_db_mask = (DB_CNTRl_MASK << DB_CNTRL_OFF) & pin_reg; + if (reg_db_mask & pin_reg) { + tmr_out_unit = pin_reg & BIT(DB_TMR_OUT_UNIT_OFF); + tmr_large = pin_reg & BIT(DB_TMR_LARGE_OFF); + time = pin_reg & DB_TMR_OUT_MASK; + if (!tmr_large) { + if (!tmr_out_unit) + unit = 61; + else + unit = 244; + } else { + if (!tmr_out_unit) + unit = 15600; + else + unit = 62500; + } + if ((DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF) == reg_db_mask) + debounce_enable = "debouncing filter (high and low) enabled|"; + else if ((DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF) == reg_db_mask) + debounce_enable = "debouncing filter (low) enabled|"; + else + debounce_enable = "debouncing filter (high) enabled|"; + + snprintf(debounce_value, 40, + "debouncing timeout is %u (us)|", time * unit); + } else { + debounce_enable = "debouncing filter disabled|"; + snprintf(debounce_value, 30, " "); + } + seq_printf(s, "%s %s %s %s %s %s\n" - " %s %s %s %s %s %s %s 0x%x\n", + " %s %s %s %s %s %s %s %s %s 0x%x\n", level_trig, active_level, interrupt_enable, interrupt_mask, wake_cntrl0, wake_cntrl1, wake_cntrl2, pin_sts, pull_up_sel, pull_up_enable, pull_down_enable, - output_value, output_enable, pin_reg); + output_value, output_enable, + debounce_enable, debounce_value, pin_reg); } } } -- 2.28.0