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Date:   Mon, 26 Oct 2020 13:32:57 +0100
From:   Thierry Reding <treding@nvidia.com>
To:     Jingoo Han <jingoohan1@gmail.com>
CC:     Vidya Sagar <vidyas@nvidia.com>,
        "gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
        "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
        "bhelgaas@google.com" <bhelgaas@google.com>,
        "amurray@thegoodpenguin.co.uk" <amurray@thegoodpenguin.co.uk>,
        "robh@kernel.org" <robh@kernel.org>,
        "jonathanh@nvidia.com" <jonathanh@nvidia.com>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "kthota@nvidia.com" <kthota@nvidia.com>,
        "mmaddireddy@nvidia.com" <mmaddireddy@nvidia.com>,
        "sagar.tv@gmail.com" <sagar.tv@gmail.com>
Subject: Re: [PATCH 0/3] Add support to handle prefetchable memory
Message-ID: <20201026123012.GA356750@ulmo>
References: <20201023195655.11242-1-vidyas@nvidia.com>
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On Sat, Oct 24, 2020 at 04:03:41AM +0000, Jingoo Han wrote:
> On 10/23/20, 3:57 PM, Vidya Sagar wrote:
> >=20
> > This patch series adds support for configuring the DesignWare IP's ATU
> > region for prefetchable memory translations.
> > It first starts by flagging a warning if the size of non-prefetchable
> > aperture goes beyond 32-bit as PCIe spec doesn't allow it.
> > And then adds required support for programming the ATU to handle higher
> > (i.e. >4GB) sizes and then finally adds support for differentiating
> > between prefetchable and non-prefetchable regions and configuring one of
> > the ATU regions for prefetchable memory translations purpose.
> >
> > Vidya Sagar (3):
> >   PCI: of: Warn if non-prefetchable memory aperture size is > 32-bit
> >   PCI: dwc: Add support to program ATU for >4GB memory aperture sizes
> >   PCI: dwc: Add support to handle prefetchable memory mapping
>=20
> For 2nd & 3rd,
> Acked-by: Jingoo <jingoohan1@gmail.com>
> But, I still want someone to ack 1st patch, not me.
>=20
> To Vidya,
> If possible, can you ask your coworker to give 'Tested-by'? It will be ve=
ry helpful.
> Thank you.

On next-20201026 (but also going back quite a while) I'm seeing this
during boot on Jetson AGX Xavier (Tegra194):

[    3.493382] ahci 0001:01:00.0: version 3.0
[    3.493889] ahci 0001:01:00.0: SSS flag set, parallel bus scan disabled
[    4.497706] ahci 0001:01:00.0: controller reset failed (0xffffffff)
[    4.498114] ahci: probe of 0001:01:00.0 failed with error -5

After applying this series, AHCI over PCI is back to normal:

[    3.543230] ahci 0001:01:00.0: AHCI 0001.0000 32 slots 1 ports 6 Gbps 0x=
1 impl SATA mode
[    3.550841] ahci 0001:01:00.0: flags: 64bit ncq sntf led only pmp fbs pi=
o slum part sxs
[    3.559747] scsi host0: ahci
[    3.561998] ata1: SATA max UDMA/133 abar m512@0x1230010000 port 0x123001=
0100 irq 63

So for the series:

Tested-by: Thierry Reding <treding@nvidia.com>

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