Received: by 2002:a05:6a10:9e8c:0:0:0:0 with SMTP id y12csp470416pxx; Wed, 28 Oct 2020 09:04:28 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyWwSxSz/2rigI2ApQxSYbDLeBBm/PtSbeiPuMwzTAOrOvUeajqRAJyZtXsw5jdF0HZyX91 X-Received: by 2002:a05:6402:13cc:: with SMTP id a12mr8569950edx.73.1603901068491; Wed, 28 Oct 2020 09:04:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1603901068; cv=none; d=google.com; s=arc-20160816; b=Re0/VCgMP7d67gofNUKvdtwxoCvt5xuLsyC77WzSnHGV43B3IrTWkqUZWKg/EJwxt+ ptfeB+oI1wA5DWj3h3o5adR1hhBIcjaliCz9JQC4xciufFiTIozgVzl+wx7tMmNriOJJ RqjMjY+lAXP4ZqZkun7XGvxJFknNdnefwp/l+zcND0FS7yTsshXip3CCS9XzhQYkk0Ck ++Qfwr1R5lP0i1vQevVMBqR6vR8KiZkTER6WQEO7dMiSHdBJtpsUeZJ6epN9VbyJXcbC HQJ/Y/sweD9X1Ad8sehl1Txt+u8Ktf2oAqDEiYFli2Enq3HeaCm17mQg4qNnKKDLp8n0 ZNlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=X3H8xguo2Mm/EyC5yBVBoJCvy6Bd4Ojh1abpJdV/oxg=; b=0kXxtFPjBIAU4CiGlXYtCZNiRPz/3PYOnvRfgjuCbZ6DBNfwuGknjSzJzPNBsDjAGv /t0tUsydGRpJ66+5gdylYtwfEZYIH4Mlh7t6M0RIucOesInyjV8usqrhm9E4F/la3I0i aLUmf2efKJ5rz/EYFgGfeg/+Ipz3Yn0X7R7ZwRa6Hi1T9Jotr8cfhh7mRrKsCicss/ul VFX9IoJycVyV5ceRXLgeXlfeAg8uitDrOVASTQUFxWlbq9s4JIIVKzDXhGGbxDm+hH+9 pUFz6nWYceOpQvpSQhpBjajexSsSI7J/CMSZVu0xX7tdRJY7RTKRSDklPROyqEY823qT IRwQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=ODHv5AQk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dk22si2709939edb.258.2020.10.28.09.04.05; Wed, 28 Oct 2020 09:04:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=ODHv5AQk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1814560AbgJ0Q6l (ORCPT + 99 others); Tue, 27 Oct 2020 12:58:41 -0400 Received: from mail.kernel.org ([198.145.29.99]:45290 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S368628AbgJ0PJt (ORCPT ); Tue, 27 Oct 2020 11:09:49 -0400 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 50ADD206F4; Tue, 27 Oct 2020 15:09:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603811388; bh=K5QXepUTlPLsvzjXreFIj/pzZe/3r3kaWx0hy31khZw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ODHv5AQkAZ+lscTv98UaJ3beGTTO0kb8kncVTJ44K4/Ig8D4w+GsHhHcR3G3kMrUB emaNy4TB8tb+uEXYnd9Vzsj6ZgYvm2LnZObZXCjAJlRe0hI6mA3gEyy35nwC4eeHHT Kr4rwlfLBzl1tdZfGHAlUtVgT4izo9IvDOK/79Lc= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Wendell Lin , Hanks Chen , Matthias Brugger , Stephen Boyd , Sasha Levin Subject: [PATCH 5.8 448/633] clk: mediatek: add UART0 clock support Date: Tue, 27 Oct 2020 14:53:11 +0100 Message-Id: <20201027135543.727266851@linuxfoundation.org> X-Mailer: git-send-email 2.29.1 In-Reply-To: <20201027135522.655719020@linuxfoundation.org> References: <20201027135522.655719020@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Hanks Chen [ Upstream commit 804a892456b73604b7ecfb1b00a96a29f3d2aedf ] Add MT6779 UART0 clock support. Fixes: 710774e04861 ("clk: mediatek: Add MT6779 clock support") Signed-off-by: Wendell Lin Signed-off-by: Hanks Chen Reviewed-by: Matthias Brugger Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin --- drivers/clk/mediatek/clk-mt6779.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/mediatek/clk-mt6779.c b/drivers/clk/mediatek/clk-mt6779.c index 9766cccf5844c..6e0d3a1667291 100644 --- a/drivers/clk/mediatek/clk-mt6779.c +++ b/drivers/clk/mediatek/clk-mt6779.c @@ -919,6 +919,8 @@ static const struct mtk_gate infra_clks[] = { "pwm_sel", 19), GATE_INFRA0(CLK_INFRA_PWM, "infra_pwm", "pwm_sel", 21), + GATE_INFRA0(CLK_INFRA_UART0, "infra_uart0", + "uart_sel", 22), GATE_INFRA0(CLK_INFRA_UART1, "infra_uart1", "uart_sel", 23), GATE_INFRA0(CLK_INFRA_UART2, "infra_uart2", -- 2.25.1