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Subject: Re: [PATCH v6 04/52] dt-bindings: memory: tegra20: emc: Document
 nvidia,memory-controller property
To:     Krzysztof Kozlowski <krzk@kernel.org>
Cc:     Thierry Reding <thierry.reding@gmail.com>,
        Jonathan Hunter <jonathanh@nvidia.com>,
        Georgi Djakov <georgi.djakov@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Peter De Schrijver <pdeschrijver@nvidia.com>,
        MyungJoo Ham <myungjoo.ham@samsung.com>,
        Kyungmin Park <kyungmin.park@samsung.com>,
        Chanwoo Choi <cw00.choi@samsung.com>,
        Mikko Perttunen <cyndis@kapsi.fi>,
        Viresh Kumar <vireshk@kernel.org>,
        Peter Geis <pgwipeout@gmail.com>,
        Nicolas Chauvet <kwizart@gmail.com>,
        linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org,
        linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
        devicetree@vger.kernel.org
References: <20201025221735.3062-1-digetx@gmail.com>
 <20201025221735.3062-5-digetx@gmail.com> <20201027085417.GD4244@kozik-lap>
 <54191034-dcb9-7cab-333b-5bb2553f0ed1@gmail.com>
 <20201027193039.GA140636@kozik-lap>
From:   Dmitry Osipenko <digetx@gmail.com>
Message-ID: <90df8e53-6dec-f75f-5f82-539cb0f72583@gmail.com>
Date:   Tue, 27 Oct 2020 23:37:28 +0300
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27.10.2020 22:30, Krzysztof Kozlowski пишет:
> On Tue, Oct 27, 2020 at 10:17:19PM +0300, Dmitry Osipenko wrote:
>> 27.10.2020 11:54, Krzysztof Kozlowski пишет:
>>> On Mon, Oct 26, 2020 at 01:16:47AM +0300, Dmitry Osipenko wrote:
>>>> Tegra20 External Memory Controller talks to DRAM chips and it needs to be
>>>> reprogrammed when memory frequency changes. Tegra Memory Controller sits
>>>> behind EMC and these controllers are tightly coupled. This patch adds the
>>>> new phandle property which allows to properly express connection of EMC
>>>> and MC hardware in a device-tree, it also put the Tegra20 EMC binding on
>>>> par with Tegra30+ EMC bindings, which is handy to have.
>>>>
>>>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
>>>> ---
>>>>  .../bindings/memory-controllers/nvidia,tegra20-emc.txt          | 2 ++
>>>>  1 file changed, 2 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
>>>> index 567cffd37f3f..1b0d4417aad8 100644
>>>> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
>>>> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
>>>> @@ -12,6 +12,7 @@ Properties:
>>>>    irrespective of ram-code configuration.
>>>>  - interrupts : Should contain EMC General interrupt.
>>>>  - clocks : Should contain EMC clock.
>>>> +- nvidia,memory-controller : Phandle of the Memory Controller node.
>>>
>>> It looks like you adding a required property which is an ABI break.
>> The T20 EMC driver is unused so far in upstream and it will become used
>> only once this series is applied. Hence it's fine to change the ABI.
> 
> The ABI is not about upstream, but downstream. There are no other
> upstreams using this ABI. Unless you have in mind that existing T20 EMC
> driver was a noop, doing absolutely nothing, therefore there is no
> breakage of any other users?

The T20 EMC driver was a 100% noop for now. It's safe to change the ABI.

The T30/124 EMC drivers have users, but these are unsafe drivers (with
the known issues) until this series is applied.