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Subject: Re: [PATCH v2] usb: xhci: Workaround for S3 issue on AMD SNPS 3.0 xHC
To:     Mathias Nyman <mathias.nyman@linux.intel.com>,
        Sandeep Singh <Sandeep.Singh@amd.com>, mathias.nyman@intel.com,
        gregkh@linuxfoundation.org, linux-usb@vger.kernel.org,
        linux-kernel@vger.kernel.org, sanket.goswami@amd.com,
        Nehal-bakulchandra.Shah@amd.com
Cc:     Shyam-sundar.S-k@amd.com
References: <20201023131503.759671-1-Sandeep.Singh@amd.com>
 <ed3847f0-f219-547a-e887-cd0d48f77dda@linux.intel.com>
From:   "Singh, Sandeep" <ssingh1@amd.com>
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Date:   Wed, 28 Oct 2020 12:01:29 +0530
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On 10/26/2020 8:16 PM, Mathias Nyman wrote:
> [CAUTION: External Email]
>
> On 23.10.2020 16.15, Sandeep Singh wrote:
>> From: Sandeep Singh <sandeep.singh@amd.com>
>>
>> On some platform of AMD, S3 fails with HCE and SRE errors. To fix this,
>> need to disable a bit which is enable in sparse controller.
>>
>> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
>> Signed-off-by: Sandeep Singh <sandeep.singh@amd.com>
>> ---
>> Changes since v1:(https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2020%2F10%2F23%2F368&amp;data=04%7C01%7CSandeep.Singh%40amd.com%7Ca8900bc99ca441507cc408d879bdc5e9%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637393203258053573%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=GM7TXOawh6nLZaX1ABZLlptYeyoUSMHnwhCxbY6zFZI%3D&amp;reserved=0)
>>        -> Add xhci.h changes
>>
> Added to queue.
> This looks like it should go to stable as well.

Thanks Mathias , please help to queue this up from 4.19+.

Regards

Sandeep

>
> -Mathias