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Date:   Thu, 29 Oct 2020 12:00:38 +0200
From:   Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To:     Mika Westerberg <mika.westerberg@linux.intel.com>
Cc:     linux-kernel@vger.kernel.org,
        Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [PATCH v1] pinctrl: intel: Add Intel Alder Lake pin controller
 support
Message-ID: <20201029100038.GE4077@smile.fi.intel.com>
References: <20201026192552.20903-1-andriy.shevchenko@linux.intel.com>
 <20201029080827.GN2495@lahna.fi.intel.com>
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On Thu, Oct 29, 2020 at 10:08:27AM +0200, Mika Westerberg wrote:

> I think the $subject should say "Alder Lake-S" as this is for -S
> variant.

OK!

...

> > @@ -158,4 +166,5 @@ config PINCTRL_TIGERLAKE
> >  	help
> >  	  This pinctrl driver provides an interface that allows configuring
> >  	  of Intel Tiger Lake PCH pins and using them as GPIOs.
> > +
> 
> Is this intentional ws change?

I guess it was intentional at some point, but not strictly related to this new
driver. I can split it out.

> >  endif
> 
> Otherwise looks good to me.

I'll send v2 soon.

-- 
With Best Regards,
Andy Shevchenko