Received: by 2002:a05:6a10:9e8c:0:0:0:0 with SMTP id y12csp1094005pxx; Fri, 30 Oct 2020 01:39:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy5U4XzKb/dsjfLgD89Zex1F11Gg7VDzJ95wIVQVKQDWORAvzNART9/vIjJZDGB1SFsr+iO X-Received: by 2002:aa7:dcc7:: with SMTP id w7mr1157337edu.54.1604047156429; Fri, 30 Oct 2020 01:39:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1604047156; cv=none; d=google.com; s=arc-20160816; b=FZNAVJBCwGO3pWmxbptOrJGaFiLOeTFtU8jrERVIvRHHnVzaOS1OvjQErNLDI9cl/r 7v4tF0Nn49Y80CHgP3CxCzFXK6wvaCW0rb5yh6K32ZmZDqpaPghvNLbdj6EaWbiZSMDn LFAf5DYILCGDT25jx8n6dhiEg+wk8lUg4ggP3VKoTptIV8VoYOqNuTOWNiAwNx7bwqel W5usu6dDUt7v6QiVHRyGIHfL0Udj99/pme5WkgGsgoktb8JI89HEayxlLYZ1OjW9PyPj AlyPea3t9aY1i8Rha2sGZXo9rgH2uM6xBoLK7+inNir998GcyF+FMbQF3Rt8/SoKQluJ YjJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :organization:references:in-reply-to:message-id:subject:cc:to:from :date; bh=EewsRbNRFnikhB7rYBK1auNpctyQd1ndxDpTfWtJoXg=; b=Dahel2t30bAYSM5U6nN/etDHXPxY1CwWKYCZBIqlkgv8qinfunyTF/1PQe0ePIigGP Gu2Sd/kxYW7OPNZ210/h4ybyVnpc9/xVuyDiDs4OYGwM6kvrzt4o7iC1H6v2WsV3OUOI 5UBPyMNueb5UGSbJWisBXbj9hA6X4C/zaapxvMzCkVqWTlrlgwaAGZUDfL3ujFSOcsoC NulKMDnwd+82sUF8G76DuKGgKFqvgiD89xed2TPnh2cUKRhKb6lgNolI8zmKCmOBsgNi S/x5K4Ar3FcIlYD4D9YProtCQQ3GF3znCUAtbS/cu2ln2s+NkzSAvawki4gLYevVbOba XuPQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d13si3839679edl.534.2020.10.30.01.38.53; Fri, 30 Oct 2020 01:39:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725875AbgJ3Ig0 convert rfc822-to-8bit (ORCPT + 99 others); Fri, 30 Oct 2020 04:36:26 -0400 Received: from relay5-d.mail.gandi.net ([217.70.183.197]:35259 "EHLO relay5-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725790AbgJ3Ig0 (ORCPT ); Fri, 30 Oct 2020 04:36:26 -0400 X-Originating-IP: 91.224.148.103 Received: from xps13 (unknown [91.224.148.103]) (Authenticated sender: miquel.raynal@bootlin.com) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id 071C21C0005; Fri, 30 Oct 2020 08:36:22 +0000 (UTC) Date: Fri, 30 Oct 2020 09:36:21 +0100 From: Miquel Raynal To: Christophe Kerello Cc: , , , , Subject: Re: [PATCH] mtd: rawnand: stm32_fmc2: fix broken ECC Message-ID: <20201030093621.6315ea1a@xps13> In-Reply-To: References: <1603989492-6670-1-git-send-email-christophe.kerello@st.com> <20201030091905.111aa7a4@xps13> Organization: Bootlin X-Mailer: Claws Mail 3.17.4 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Christophe, Christophe Kerello wrote on Fri, 30 Oct 2020 09:31:25 +0100: > Hi Miquel, > > On 10/30/20 9:19 AM, Miquel Raynal wrote: > > Hi Christophe, > > > > Christophe Kerello wrote on Thu, 29 Oct > > 2020 17:38:12 +0100: > > > >> Since commit d7157ff49a5b ("mtd: rawnand: Use the ECC framework user > >> input parsing bits"), ECC are broken in FMC2 driver in case of > >> nand-ecc-step-size and nand-ecc-strength are not set in the device tree. > >> The default user configuration set in FMC2 driver is lost when > >> rawnand_dt_init function is called. To avoid to lose the default user > >> configuration, it is needed to move it in the new user_conf structure. > >> > >> Signed-off-by: Christophe Kerello > >> Fixes: d7157ff49a5b ("mtd: rawnand: Use the ECC framework user input parsing bits") > >> --- > >> drivers/mtd/nand/raw/stm32_fmc2_nand.c | 8 +++++--- > >> 1 file changed, 5 insertions(+), 3 deletions(-) > >> > >> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c > >> index b31a581..dc86ac9 100644 > >> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c > >> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c > >> @@ -1846,6 +1846,7 @@ static int stm32_fmc2_nfc_probe(struct platform_device *pdev) > >> struct resource *res; > >> struct mtd_info *mtd; > >> struct nand_chip *chip; > >> + struct nand_device *nanddev; > >> struct resource cres; > >> int chip_cs, mem_region, ret, irq; > >> int start_region = 0; > >> @@ -1952,10 +1953,11 @@ static int stm32_fmc2_nfc_probe(struct platform_device *pdev) > >> chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE | > >> NAND_USES_DMA; > >> >> - /* Default ECC settings */ > >> + /* Default ECC user settings */ > >> chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; > >> - chip->ecc.size = FMC2_ECC_STEP_SIZE; > >> - chip->ecc.strength = FMC2_ECC_BCH8; > >> + nanddev = mtd_to_nanddev(mtd); > >> + nanddev->ecc.user_conf.step_size = FMC2_ECC_STEP_SIZE; > >> + nanddev->ecc.user_conf.strength = FMC2_ECC_BCH8; > >> >> /* Scan to find existence of the device */ > >> ret = nand_scan(chip, nand->ncs); > > > > Sorry for breaking the driver with this change, but now I think we > > should have all ECC related bits in ->attach() instead of ->probe(). > > The ->attach() hook is called during the nand_scan() operation and at > > this point the chip's requirements/layout are known (not before). I > > know that certain controllers don't really care about that, here your > > simply hardcode these two fields and you don't need to know anything > > about the chip's properties. But as a bid to harmonize all drivers with > > the target of a generic ECC engine in mind, I think it's now time to > > move these three lines (chip->ecc.* = ...) at the top of ->attach(). > > Also, these fields should have been populated by the core so perhaps > > the best approach is to check if the user requirements are synced with > > the controller's capabilities and error out otherwise? > > > > We plan to send a fixes PR for -rc2, if the v2 arrives today I'll > > integrate it. > > Ok. Issue is that the controller is initialized when stm32_fmc2_nfc_select_chip is called. This function will be called before the ->attach() hook, when the first command will be sent to the NAND device (reset command). So, moving the default ECC initialization > needs probably more modifications in the driver. > I will try to send a v2 today. The ECC engine is not supposed to be used before nand_scan() and its default state should be disabled. Maybe this driver needs an update about that, but then -hopefully- it will be pretty straightforward. No hurry though, if the fix is not ready we'll wait an additional week (it will be in next as soon as it is ready anyway). Thanks, Miquèl