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Date:   Mon, 2 Nov 2020 12:12:45 +0100
From:   Borislav Petkov <bp@alien8.de>
To:     "Luck, Tony" <tony.luck@intel.com>
Cc:     Thomas Gleixner <tglx@linutronix.de>,
        Philippe Conde <conde.philippe@skynet.be>, x86@kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH] x86/mce: Enable additional error logging on certain
 Intel CPUs
Message-ID: <20201102111245.GA15392@zn.tnic>
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On Fri, Oct 30, 2020 at 12:08:07PM -0700, Luck, Tony wrote:
> On Fri, Oct 30, 2020 at 12:04:03PM -0700, Luck, Tony wrote:
> 
> Bah, didn't notice this conversation didn't include LKML.
> 
> > The Xeon versions of Sandy Bridge, Ivy Bridge and Haswell support an
> > optional additional error logging mode which is enabled by an MSR.
> > 
> > Previously this mode was enabled from the mcelog(8) tool via /dev/cpu,
> > but the kernel is now very picky about which MSRs may be written. So
> > move the enabling into the kernel.
> > 
> > Suggested-by: Boris Petkov <bp@alien8.de>
> > Signed-off-by: Tony Luck <tony.luck@intel.com>
> > ---
> > 
> > N.B. I don't have any of these old systems in my lab any more. So
> > this is untested :-(

I do:

# rdmsr 0x0000017f
2

Thx for doing this, queued.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette