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Date:   Mon, 2 Nov 2020 14:44:18 +0100
From:   Maxime Ripard <maxime@cerno.tech>
To:     Paul Kocialkowski <contact@paulk.fr>
Cc:     devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
        Chen-Yu Tsai <wens@csie.org>,
        Matteo Scordino <matteo.scordino@gmail.com>,
        Icenowy Zheng <icenowy@aosc.io>
Subject: Re: [PATCH 6/9] ARM: dts: sun8i-v3s: Add the V3s NMI IRQ controller
Message-ID: <20201102134418.vn7i3e4gpwomxcnj@gilmour.lan>
References: <20201031182137.1879521-1-contact@paulk.fr>
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On Mon, Nov 02, 2020 at 11:25:22AM +0100, Paul Kocialkowski wrote:
> Hi,
>=20
> On Mon 02 Nov 20, 11:12, Maxime Ripard wrote:
> > On Sat, Oct 31, 2020 at 07:21:34PM +0100, Paul Kocialkowski wrote:
> > > The V3s/V3 has a NMI interrupt controller, mainly used for the AXP209.
> > > Its address follows the sytsem controller block, which was previously
> > > incorrectly described as spanning over 0x1000 address bytes.
> >=20
> > Is it after, or right in the middle of it?
>=20
> That's up for interpretation actually:
> - The V3 datasheet mentions that System Control is 0x01C00000 --- 0x01C00=
FFF;
> - In practice, sunxi_sram.c uses a regmap with max_reg set to 0x30 for the
>   V3s/H3 so this gives us some room.
>=20
> Looking at other SoCs with the same setup (take sun8i-r40 for instance),
> system-control is limited to 0x30 and the NMI controller follows it.
> In the case of R40, the SRAM controlled is also said to be 4K-long in the
> Allwinner docs.
>=20
> So all in all, this leads me to believe that the system-controller instan=
ce
> stops well before 0x1c000d0 on the V3s as well. Otherwise, we should also
> make the R40 consistent.

That's a bit unfortunate, but yeah, I guess we want to remain consistent he=
re.

Maxime

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