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From:   Doug Anderson <dianders@chromium.org>
Date:   Mon, 2 Nov 2020 08:18:47 -0800
Message-ID: <CAD=FV=VHvL4A3U==CECbgkfvRcy51v4cSBjodvRGA2463L+CZQ@mail.gmail.com>
Subject: Re: [PATCH v2 1/4] drm/bridge: ti-sn65dsi86: Combine register
 accesses in ti_sn_aux_transfer()
To:     Stephen Boyd <swboyd@chromium.org>
Cc:     Andrzej Hajda <a.hajda@samsung.com>,
        Neil Armstrong <narmstrong@baylibre.com>,
        LKML <linux-kernel@vger.kernel.org>,
        dri-devel <dri-devel@lists.freedesktop.org>,
        Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
        Jonas Karlman <jonas@kwiboo.se>,
        Jernej Skrabec <jernej.skrabec@siol.net>,
        Sean Paul <seanpaul@chromium.org>
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Precedence: bulk

Hi,

On Thu, Oct 29, 2020 at 6:17 PM Stephen Boyd <swboyd@chromium.org> wrote:
>
> These register reads and writes are sometimes directly next to each
> other in the register address space. Let's use regmap bulk read/write
> APIs to get the data with one transfer instead of multiple i2c
> transfers. This helps cut down on the number of transfers in the case of
> something like reading an EDID where we read in blocks of 16 bytes at a
> time and the last for loop here is sending an i2c transfer for each of
> those 16 bytes, one at a time. Ouch!
>
> Changes in v2:
>  - Combined AUX_CMD register write

The change from v1 to v2 makes me slightly nervous, though I guess
it's fine.  Specifically, all the examples in the datasheet show
programming the CMD before the ADDR and LEN.  This change will make it
programmed after.  Since there's a separate START bit I guess it's OK,
though.  Nothing in the datasheet explicitly says that the order in
the examples is the only order that will work...

Reviewed-by: Douglas Anderson <dianders@chromium.org>