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Date:   Mon, 2 Nov 2020 17:59:22 +0100
From:   Paul Kocialkowski <contact@paulk.fr>
To:     Maxime Ripard <maxime@cerno.tech>
Cc:     devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
        Chen-Yu Tsai <wens@csie.org>,
        Matteo Scordino <matteo.scordino@gmail.com>,
        Icenowy Zheng <icenowy@aosc.io>
Subject: Re: [PATCH 6/9] ARM: dts: sun8i-v3s: Add the V3s NMI IRQ controller
Message-ID: <20201102165922.GB2037@collins>
References: <20201031182137.1879521-1-contact@paulk.fr>
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 <20201102101211.wtkmgfm2rcm5gdyp@gilmour.lan>
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On Mon 02 Nov 20, 14:44, Maxime Ripard wrote:
> On Mon, Nov 02, 2020 at 11:25:22AM +0100, Paul Kocialkowski wrote:
> > Hi,
> >=20
> > On Mon 02 Nov 20, 11:12, Maxime Ripard wrote:
> > > On Sat, Oct 31, 2020 at 07:21:34PM +0100, Paul Kocialkowski wrote:
> > > > The V3s/V3 has a NMI interrupt controller, mainly used for the AXP2=
09.
> > > > Its address follows the sytsem controller block, which was previous=
ly
> > > > incorrectly described as spanning over 0x1000 address bytes.
> > >=20
> > > Is it after, or right in the middle of it?
> >=20
> > That's up for interpretation actually:
> > - The V3 datasheet mentions that System Control is 0x01C00000 --- 0x01C=
00FFF;
> > - In practice, sunxi_sram.c uses a regmap with max_reg set to 0x30 for =
the
> >   V3s/H3 so this gives us some room.
> >=20
> > Looking at other SoCs with the same setup (take sun8i-r40 for instance),
> > system-control is limited to 0x30 and the NMI controller follows it.
> > In the case of R40, the SRAM controlled is also said to be 4K-long in t=
he
> > Allwinner docs.
> >=20
> > So all in all, this leads me to believe that the system-controller inst=
ance
> > stops well before 0x1c000d0 on the V3s as well. Otherwise, we should al=
so
> > make the R40 consistent.
>=20
> That's a bit unfortunate, but yeah, I guess we want to remain consistent =
here.

Honestly I think the Allwinner docs are plain wrong on this one.
IIRC they used to describe the NMI as a separate controller in the memory
map. I think they just overlook it now and copy/paste 4K size for each
controller regardless of the actual hardware, so I'm not very worried.

Cheers,

Pauls

--=20
Developer of free digital technology and hardware support.

Website: https://www.paulk.fr/
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