Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp1113524pxb; Tue, 3 Nov 2020 23:49:15 -0800 (PST) X-Google-Smtp-Source: ABdhPJwKd++UAo3CI6VMCS75LvDQrO+13DeJJKYR3s/KhTu9DCP9fq2eq3fEmVDs6f0rm0nF1zpU X-Received: by 2002:a50:83e5:: with SMTP id 92mr26492049edi.307.1604476155080; Tue, 03 Nov 2020 23:49:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1604476155; cv=none; d=google.com; s=arc-20160816; b=sH7pqT5K1hYb9CZY0kkXgj54FS8u4JAjQ+3NKROlzNKa4YX4sVWLuXSqoQQ5+ak6Xe zyBsjaX4x5wQRNurk/cVNRDwOFAWJIuO7azdKQEwVzpngWueLSseHH4j8fx0I0SjLMUJ O/YlfjyzUEKbHZzMNOuwPXLsArBW/BFsu7Gz7L830GyvgwQmichoG+2m+A40Cr7wX2j0 ONEu83TtPb11m4hBIouVNWTp0v8mJUsGUj8GDLygsztYwU78vMe/1Uk5RKeRadS7uTfx QlL/gWrRdgHc8gQkL7W1ELHq2CEPWJQBgW8k0isG7hGcOPYRHzGiuUCovDDz9c3I2UwB CcRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:dkim-signature:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=QeSqa6GvM+bf3uNLQi9VSfzj1po5EbjFmVrkNpp/7gA=; b=PELnySf/JPHZf6gEovOBEeV7dTuGrPcJ88iwlutvVagpTD+RqtE9Zd5OFQGvlXOSJg vMU3NaZGyX3pGg1gN1nfPkMEdL+g8sGMURIEbYUREQw6Y4aq1pyNjxvml/+NULJXtjXr Wh5RMvjZfewe9fYN4lewMA7eRj3DECUVx02ByXpiwGQ4Hg2AbmGTid3AllvueEzcNQUN 5xivJ3248L4LUXWP/U/wAM64sHABv3qUgGXEd1y4JIeo/1I9Eql1qiWlNQgb2I+Qm6Rk FH2l0ojFmoJM4G/h02Xg+21bDGVR4nIiSO3eGjCXCWjo35tzrZPfceP9CRmY3OAKqVD9 Fi8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=Ifr6JUnC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i6si937788ejo.223.2020.11.03.23.48.51; Tue, 03 Nov 2020 23:49:15 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=Ifr6JUnC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728263AbgKDHrP (ORCPT + 99 others); Wed, 4 Nov 2020 02:47:15 -0500 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:17978 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726152AbgKDHrO (ORCPT ); Wed, 4 Nov 2020 02:47:14 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Tue, 03 Nov 2020 23:47:13 -0800 Received: from [10.40.203.207] (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 4 Nov 2020 07:47:02 +0000 Subject: Re: [PATCH 0/3] Add support to handle prefetchable memory To: Thierry Reding , Jingoo Han , "lorenzo.pieralisi@arm.com" , "bhelgaas@google.com" CC: "gustavo.pimentel@synopsys.com" , "amurray@thegoodpenguin.co.uk" , "robh@kernel.org" , "jonathanh@nvidia.com" , "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "kthota@nvidia.com" , "mmaddireddy@nvidia.com" , "sagar.tv@gmail.com" References: <20201023195655.11242-1-vidyas@nvidia.com> <20201026123012.GA356750@ulmo> From: Vidya Sagar Message-ID: <53277a71-13e5-3e7e-7c51-aca367b99d31@nvidia.com> Date: Wed, 4 Nov 2020 13:16:57 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.3.2 MIME-Version: 1.0 In-Reply-To: <20201026123012.GA356750@ulmo> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1604476033; bh=QeSqa6GvM+bf3uNLQi9VSfzj1po5EbjFmVrkNpp/7gA=; h=Subject:To:CC:References:From:Message-ID:Date:User-Agent: MIME-Version:In-Reply-To:Content-Type:Content-Language: Content-Transfer-Encoding:X-Originating-IP:X-ClientProxiedBy; b=Ifr6JUnC5B0NMRMUvYd+/WhhZXKPkWuzhCfs3e+itFu4MJSEU5ixIMKMSxduPdom6 iMu+6cSqqUssACAej8CuEl7tghcArGXURwtZSse9j4QNSAmOZRVtRyETY53B2FEpOQ 1oNnf1vdPWfzD/wXf1A5v/oLDuWaXhrBFa4cIglsmUXLarT4rFHiVb4nY3fkG0GYun Odq3MJifchS403KcZ7QDrvv4qiwWn6dyitZ+ZG+e04Aqnh7PW2zT1hmFrMRSRJ0fq5 +xv+TGOjqKmKIvJkY2LQfAHQ2OYZfA/PLiPsRV5I29acgF1PSRbeumhQ5gxDQbvFKu JWx8cuiOxBRWA== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Lorenzo / Bjorn, Could you please review patches-1 & 2 in this series? For the third patch, we already went with Rob's patch @ http://patchwork.ozlabs.org/project/linux-pci/patch/20201026154852.221483-1-robh@kernel.org/ Thanks, Vidya Sagar On 10/26/2020 6:02 PM, Thierry Reding wrote: > On Sat, Oct 24, 2020 at 04:03:41AM +0000, Jingoo Han wrote: >> On 10/23/20, 3:57 PM, Vidya Sagar wrote: >>> >>> This patch series adds support for configuring the DesignWare IP's ATU >>> region for prefetchable memory translations. >>> It first starts by flagging a warning if the size of non-prefetchable >>> aperture goes beyond 32-bit as PCIe spec doesn't allow it. >>> And then adds required support for programming the ATU to handle higher >>> (i.e. >4GB) sizes and then finally adds support for differentiating >>> between prefetchable and non-prefetchable regions and configuring one of >>> the ATU regions for prefetchable memory translations purpose. >>> >>> Vidya Sagar (3): >>> PCI: of: Warn if non-prefetchable memory aperture size is > 32-bit >>> PCI: dwc: Add support to program ATU for >4GB memory aperture sizes >>> PCI: dwc: Add support to handle prefetchable memory mapping >> >> For 2nd & 3rd, >> Acked-by: Jingoo >> But, I still want someone to ack 1st patch, not me. >> >> To Vidya, >> If possible, can you ask your coworker to give 'Tested-by'? It will be very helpful. >> Thank you. > > On next-20201026 (but also going back quite a while) I'm seeing this > during boot on Jetson AGX Xavier (Tegra194): > > [ 3.493382] ahci 0001:01:00.0: version 3.0 > [ 3.493889] ahci 0001:01:00.0: SSS flag set, parallel bus scan disabled > [ 4.497706] ahci 0001:01:00.0: controller reset failed (0xffffffff) > [ 4.498114] ahci: probe of 0001:01:00.0 failed with error -5 > > After applying this series, AHCI over PCI is back to normal: > > [ 3.543230] ahci 0001:01:00.0: AHCI 0001.0000 32 slots 1 ports 6 Gbps 0x1 impl SATA mode > [ 3.550841] ahci 0001:01:00.0: flags: 64bit ncq sntf led only pmp fbs pio slum part sxs > [ 3.559747] scsi host0: ahci > [ 3.561998] ata1: SATA max UDMA/133 abar m512@0x1230010000 port 0x1230010100 irq 63 > > So for the series: > > Tested-by: Thierry Reding >