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[209.85.217.49]) by smtp.gmail.com with ESMTPSA id i3sm307140vkp.6.2020.11.04.07.42.14 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 Nov 2020 07:42:14 -0800 (PST) Received: by mail-vs1-f49.google.com with SMTP id b3so11705631vsc.5 for ; Wed, 04 Nov 2020 07:42:14 -0800 (PST) X-Received: by 2002:a67:ef98:: with SMTP id r24mr8004994vsp.37.1604504533670; Wed, 04 Nov 2020 07:42:13 -0800 (PST) MIME-Version: 1.0 References: <20201104094950.2096-1-m.reichl@fivetechno.de> <4984701.vSXMUKeAfh@diego> In-Reply-To: <4984701.vSXMUKeAfh@diego> From: Doug Anderson Date: Wed, 4 Nov 2020 07:42:01 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] arm64: dts: rockchip: Assign a fixed index to mmc devices on rk3399-roc-pc boards. To: =?UTF-8?Q?Heiko_St=C3=BCbner?= Cc: "open list:ARM/Rockchip SoC..." , Liam Girdwood , Mark Brown , Rob Herring , Markus Reichl , Rob Herring , LKML , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux ARM Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Wed, Nov 4, 2020 at 2:51 AM Heiko St=C3=BCbner wrote: > > Hi Markus, > > Am Mittwoch, 4. November 2020, 10:49:45 CET schrieb Markus Reichl: > > Recently introduced async probe on mmc devices can shuffle block IDs. > > Pin them to fixed values to ease booting in evironments where UUIDs > > are not practical. Use newly introduced aliases for mmcblk devices from= [1]. > > > > [1] > > https://patchwork.kernel.org/patch/11747669/ > > > > Signed-off-by: Markus Reichl > > --- > > arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm= 64/boot/dts/rockchip/rk3399-roc-pc.dtsi > > index e7a459fa4322..bc9482b59428 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi > > @@ -13,6 +13,11 @@ / { > > model =3D "Firefly ROC-RK3399-PC Board"; > > compatible =3D "firefly,roc-rk3399-pc", "rockchip,rk3399"; > > > > + aliases { > > + mmc0 =3D &sdmmc; > > + mmc1 =3D &sdhci; > > + }; > > + > > Any reason for this odering? > > I.e. some previous incarnations had it ordered as (emmc, mmc, sdio). > This is also true for the ChromeOS out-of-tree usage of those, the > rk3399 dts in the chromeos-4.4 tree also orders this as sdhci, sdmmc, sdi= o. > > And I guess a further question would be when we're doing arbitary orderin= gs > anyway, why is this not in rk3399.dtsi ;-) ? Though I personally like the idea of eMMC, which is typically built-in, as being the "0" number, I'm personally happy with any numbering scheme that's consistent. Ordering them by base address is OK w/ me and seems less controversial. That seems like it could go in rk3399.dtsi and then if a particular board wanted a different order they could override it in their board file. The downside of putting in rk3399 is that boards that don't have all SD/MMC interfaces enabled would definitely get a new number compared to old kernels, but hopefully this is the last time? -Doug