Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Date:   Wed, 4 Nov 2020 10:47:27 -0500
From:   William Breathitt Gray <vilhelm.gray@gmail.com>
To:     Arnaud de Turckheim <quarium@gmail.com>
Cc:     linus.walleij@linaro.org, bgolaszewski@baylibre.com,
        linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: Re: [PATCH 2/3] gpio: pcie-idio-24: Fix IRQ Enable Register value
Message-ID: <20201104154727.GC406355@shinobu>
References: <20201104152455.40627-1-quarium@gmail.com>
 <20201104152455.40627-3-quarium@gmail.com>
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On Wed, Nov 04, 2020 at 04:24:54PM +0100, Arnaud de Turckheim wrote:
> This fixes the COS Enable Register value for enabling/disabling the
> corresponding IRQs bank.
>=20
> Fixes: 585562046628 ("gpio: Add GPIO support for the ACCES PCIe-IDIO-24 f=
amily")
> Signed-off-by: Arnaud de Turckheim <quarium@gmail.com>

Reviewed-by: William Breathitt Gray <vilhelm.gray@gmail.com>

> ---
>  drivers/gpio/gpio-pcie-idio-24.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>=20
> diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-id=
io-24.c
> index 5ea517416366..a61de14d09b6 100644
> --- a/drivers/gpio/gpio-pcie-idio-24.c
> +++ b/drivers/gpio/gpio-pcie-idio-24.c
> @@ -334,13 +334,13 @@ static void idio_24_irq_mask(struct irq_data *data)
>  	unsigned long flags;
>  	const unsigned long bit_offset =3D irqd_to_hwirq(data) - 24;
>  	unsigned char new_irq_mask;
> -	const unsigned long bank_offset =3D bit_offset/8 * 8;
> +	const unsigned long bank_offset =3D bit_offset / 8;
>  	unsigned char cos_enable_state;
> =20
>  	raw_spin_lock_irqsave(&idio24gpio->lock, flags);
> =20
>  	idio24gpio->irq_mask &=3D ~BIT(bit_offset);
> -	new_irq_mask =3D idio24gpio->irq_mask >> bank_offset;
> +	new_irq_mask =3D idio24gpio->irq_mask >> bank_offset * 8;
> =20
>  	if (!new_irq_mask) {
>  		cos_enable_state =3D ioread8(&idio24gpio->reg->cos_enable);
> @@ -363,12 +363,12 @@ static void idio_24_irq_unmask(struct irq_data *dat=
a)
>  	unsigned long flags;
>  	unsigned char prev_irq_mask;
>  	const unsigned long bit_offset =3D irqd_to_hwirq(data) - 24;
> -	const unsigned long bank_offset =3D bit_offset/8 * 8;
> +	const unsigned long bank_offset =3D bit_offset / 8;
>  	unsigned char cos_enable_state;
> =20
>  	raw_spin_lock_irqsave(&idio24gpio->lock, flags);
> =20
> -	prev_irq_mask =3D idio24gpio->irq_mask >> bank_offset;
> +	prev_irq_mask =3D idio24gpio->irq_mask >> bank_offset * 8;
>  	idio24gpio->irq_mask |=3D BIT(bit_offset);
> =20
>  	if (!prev_irq_mask) {
> --=20
> 2.25.1
>=20

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