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[23.128.96.18]) by mx.google.com with ESMTP id e3si1017001eja.411.2020.11.05.05.02.21; Thu, 05 Nov 2020 05:02:45 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Nf6wpifI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730968AbgKEM76 (ORCPT + 99 others); Thu, 5 Nov 2020 07:59:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731065AbgKEM74 (ORCPT ); Thu, 5 Nov 2020 07:59:56 -0500 Received: from mail-vs1-xe43.google.com (mail-vs1-xe43.google.com [IPv6:2607:f8b0:4864:20::e43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A261C0613D3 for ; Thu, 5 Nov 2020 04:59:56 -0800 (PST) Received: by mail-vs1-xe43.google.com with SMTP id t8so706764vsr.2 for ; Thu, 05 Nov 2020 04:59:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=G6PP6WiZhXC9WViPxlbziqm6I6Gyzrz5WTViUQZxV/M=; b=Nf6wpifIEeaAnkDmCBDNfmLONk65c37blngt2b2UHWA9r4vtV/7l+uofhkJfdGVUwQ pl1U4b9cTm/kile0e80PnSGAc9+POy4Ql8pvsrHmULVb7YHOD646yWkZQdftyIM7oAXM p+yw1i391J/KWaLwu/LzlOplcNH9l0T+yx0+BLPq9AHQiUUKNzzqiHF+lKxKgtZhdch5 EBwUOo4WSr6HcfhVW+xLTd97e4q8w1Q8FOYD1tJas2YIfmPy2M3pP2CD66Z7VzTLYtpP gCTvUHNcscILqy9+auVJiRnnbY4IDmxe1X3u8M5x4PS00sIS95M7arLTMlNfFkDzqc7W Hcaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=G6PP6WiZhXC9WViPxlbziqm6I6Gyzrz5WTViUQZxV/M=; b=n/QpSzoubIkI4CwqYqgdJ41Xxdd5AZTNMC/DBf1ULPEVuvMbQbx3zmqc0D4PiJd/+2 dSTOYIH6C7D2PcmP5QDpq6MAVRi+R7AJzR2JN5vEwdOkOVlZIXRfHx58tQscGzv6Vzoe S9yORK0/zkLHEO/OVA7ewyWYR1r7sRteT2F7vcybQByzgepPpX4OZIhNbAz3M6cYMNHL RmQbP0DJlh6ztmFMfmzaoZFZ/CxlM7J6nr5v9Ly4LAJOOjRf5UABXYR+Ewwfb8+smp8L Qvbo/baiL8UCJv/H/cwB0osyl4D4MmbGXhFXS1JCt8/qrPtGpgwPwJ3SGHmPgBxoghoW IUww== X-Gm-Message-State: AOAM5303kN2R4jHYrvjYHuI0YANrdBijISwMHuKTAheoK04+Zwm0l8zr CYjViKjmxmGDDYzcR879nDTOQM98zi6jWik0bmItaQ== X-Received: by 2002:a67:f417:: with SMTP id p23mr989475vsn.42.1604581195545; Thu, 05 Nov 2020 04:59:55 -0800 (PST) MIME-Version: 1.0 References: <1604397269-2780-1-git-send-email-rui_feng@realsil.com.cn> In-Reply-To: <1604397269-2780-1-git-send-email-rui_feng@realsil.com.cn> From: Ulf Hansson Date: Thu, 5 Nov 2020 13:59:18 +0100 Message-ID: Subject: Re: [PATCH 1/8] mmc: rtsx: Add test mode for RTS5261 To: Rui Feng Cc: Arnd Bergmann , Greg Kroah-Hartman , Linux Kernel Mailing List , "linux-mmc@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 3 Nov 2020 at 10:54, wrote: > > From: Rui Feng > > This patch add test mode for RTS5261. > If test mode is set, reader will switch to SD Express mode > mandatorily, and this mode is used by factory testing only. > > Signed-off-by: Rui Feng The series applied for next, thanks! Kind regards Uffe > --- > drivers/misc/cardreader/rts5261.h | 5 ----- > drivers/mmc/host/rtsx_pci_sdmmc.c | 19 ++++++++++++++++--- > include/linux/rtsx_pci.h | 4 ++++ > 3 files changed, 20 insertions(+), 8 deletions(-) > > diff --git a/drivers/misc/cardreader/rts5261.h b/drivers/misc/cardreader/rts5261.h > index 8d80f0d5d5d6..80179353bc46 100644 > --- a/drivers/misc/cardreader/rts5261.h > +++ b/drivers/misc/cardreader/rts5261.h > @@ -60,11 +60,6 @@ > /* DMACTL 0xFE2C */ > #define RTS5261_DMA_PACK_SIZE_MASK 0xF0 > > -/* FW config info register */ > -#define RTS5261_FW_CFG_INFO0 0xFF50 > -#define RTS5261_FW_EXPRESS_TEST_MASK (0x01<<0) > -#define RTS5261_FW_EA_MODE_MASK (0x01<<5) > - > /* FW status register */ > #define RTS5261_FW_STATUS 0xFF56 > #define RTS5261_EXPRESS_LINK_FAIL_MASK (0x01<<7) > diff --git a/drivers/mmc/host/rtsx_pci_sdmmc.c b/drivers/mmc/host/rtsx_pci_sdmmc.c > index c453ad403aa8..26be11a096cb 100644 > --- a/drivers/mmc/host/rtsx_pci_sdmmc.c > +++ b/drivers/mmc/host/rtsx_pci_sdmmc.c > @@ -47,6 +47,8 @@ struct realtek_pci_sdmmc { > bool using_cookie; > }; > > +static int sdmmc_init_sd_express(struct mmc_host *mmc, struct mmc_ios *ios); > + > static inline struct device *sdmmc_dev(struct realtek_pci_sdmmc *host) > { > return &(host->pdev->dev); > @@ -898,6 +900,7 @@ static int sd_power_on(struct realtek_pci_sdmmc *host) > struct mmc_host *mmc = host->mmc; > int err; > u32 val; > + u8 test_mode; > > if (host->power_state == SDMMC_POWER_ON) > return 0; > @@ -925,6 +928,15 @@ static int sd_power_on(struct realtek_pci_sdmmc *host) > return err; > > if (PCI_PID(pcr) == PID_5261) { > + /* > + * If test mode is set switch to SD Express mandatorily, > + * this is only for factory testing. > + */ > + rtsx_pci_read_register(pcr, RTS5261_FW_CFG_INFO0, &test_mode); > + if (test_mode & RTS5261_FW_EXPRESS_TEST_MASK) { > + sdmmc_init_sd_express(mmc, NULL); > + return 0; > + } > if (pcr->extra_caps & EXTRA_CAPS_SD_EXPRESS) > mmc->caps2 |= MMC_CAP2_SD_EXP | MMC_CAP2_SD_EXP_1_2V; > /* > @@ -1354,11 +1366,12 @@ static int sdmmc_init_sd_express(struct mmc_host *mmc, struct mmc_ios *ios) > RTS5261_AUX_CLK_16M_EN, RTS5261_AUX_CLK_16M_EN); > rtsx_pci_write_register(pcr, RTS5261_FW_CFG0, > RTS5261_FW_ENTER_EXPRESS, RTS5261_FW_ENTER_EXPRESS); > + rtsx_pci_write_register(pcr, RTS5261_FW_CFG1, > + RTS5261_MCU_CLOCK_GATING, RTS5261_MCU_CLOCK_GATING); > rtsx_pci_write_register(pcr, RTS5261_FW_CFG1, > RTS5261_MCU_BUS_SEL_MASK | RTS5261_MCU_CLOCK_SEL_MASK > - | RTS5261_MCU_CLOCK_GATING | RTS5261_DRIVER_ENABLE_FW, > - RTS5261_MCU_CLOCK_SEL_16M | RTS5261_MCU_CLOCK_GATING > - | RTS5261_DRIVER_ENABLE_FW); > + | RTS5261_DRIVER_ENABLE_FW, > + RTS5261_MCU_CLOCK_SEL_16M | RTS5261_DRIVER_ENABLE_FW); > host->eject = true; > return 0; > } > diff --git a/include/linux/rtsx_pci.h b/include/linux/rtsx_pci.h > index b47959f48ccd..db249e8707f3 100644 > --- a/include/linux/rtsx_pci.h > +++ b/include/linux/rtsx_pci.h > @@ -658,6 +658,10 @@ > #define PM_WAKE_EN 0x01 > #define PM_CTRL4 0xFF47 > > +/* FW config info register */ > +#define RTS5261_FW_CFG_INFO0 0xFF50 > +#define RTS5261_FW_EXPRESS_TEST_MASK (0x01 << 0) > +#define RTS5261_FW_EA_MODE_MASK (0x01 << 5) > #define RTS5261_FW_CFG0 0xFF54 > #define RTS5261_FW_ENTER_EXPRESS (0x01 << 0) > > -- > 2.17.1 >