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From:   Leo Li <leoyang.li@nxp.com>
To:     Michael Walle <michael@walle.cc>,
        "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
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        <linux-arm-kernel@lists.infradead.org>
CC:     Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Shawn Guo <shawnguo@kernel.org>
Subject: RE: [PATCH v2 5/5] arm64: dts: lx2160a: fix FlexSPI clock
Thread-Topic: [PATCH v2 5/5] arm64: dts: lx2160a: fix FlexSPI clock
Thread-Index: AQHWs6rPgIwszLN78UeuTDUjVvg++am6V+oA
Date:   Fri, 6 Nov 2020 02:00:10 +0000
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 <20201105193512.22388-6-michael@walle.cc>
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> -----Original Message-----
> From: Michael Walle <michael@walle.cc>
> Sent: Thursday, November 5, 2020 1:35 PM
> To: linux-clk@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> Cc: Michael Turquette <mturquette@baylibre.com>; Stephen Boyd
> <sboyd@kernel.org>; Rob Herring <robh+dt@kernel.org>; Shawn Guo
> <shawnguo@kernel.org>; Leo Li <leoyang.li@nxp.com>; Michael Walle
> <michael@walle.cc>
> Subject: [PATCH v2 5/5] arm64: dts: lx2160a: fix FlexSPI clock
>=20
> Now that we have a proper driver for the FlexSPI interface use it. This w=
ill fix
> SCK frequency switching on Layerscape SoCs.
>=20
> This was only compile time tested.
>=20
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
> Changes since v1:
>  - none
>=20
>  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
>=20
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index 83072da6f6c6..6e375e80bd35 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -659,9 +659,20 @@
>  		};
>=20
>  		dcfg: syscon@1e00000 {
> -			compatible =3D "fsl,lx2160a-dcfg", "syscon";
> +			#address-cells =3D <1>;
> +			#size-cells =3D <1>;
> +			compatible =3D "fsl,lx2160a-dcfg", "syscon", "simple-
> mfd";
>  			reg =3D <0x0 0x1e00000 0x0 0x10000>;
> +			ranges =3D <0x0 0x0 0x1e00000 0x10000>;
>  			little-endian;
> +
> +			fspi_clk: clock-controller@900 {
> +				compatible =3D "fsl,lx2160a-flexspi-clk";
> +				reg =3D <0x900 0x4>;
> +				#clock-cells =3D <0>;
> +				clocks =3D <&clockgen 4 0>;

This is different from the current <&clockgen 4 3>, is it an intended chang=
e?

> +				clock-output-names =3D "fspi_clk";
> +			};
>  		};
>=20
>  		tmu: tmu@1f80000 {
> @@ -776,7 +787,7 @@
>  			      <0x0 0x20000000 0x0 0x10000000>;
>  			reg-names =3D "fspi_base", "fspi_mmap";
>  			interrupts =3D <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> -			clocks =3D <&clockgen 4 3>, <&clockgen 4 3>;
> +			clocks =3D <&clockgen 4 3>, <&fspi_clk>;
>  			clock-names =3D "fspi_en", "fspi";
>  			status =3D "disabled";
>  		};
> --
> 2.20.1