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Wysocki" , Len Brown , "Ard Biesheuvel" , Yazen Ghannam Subject: Re: [PATCH v5] cper, apei, mce: Pass x86 CPER through the MCA handling chain References: <20201103164952.5126-1-Smita.KoralahalliChannabasappa@amd.com> Date: Fri, 06 Nov 2020 14:36:46 +0900 In-Reply-To: <20201103164952.5126-1-Smita.KoralahalliChannabasappa@amd.com> (Smita Koralahalli's message of "Tue, 3 Nov 2020 10:49:52 -0600") X-TSB-HOP: ON Message-ID: <87a6vv9hch.fsf@kokedama.swc.toshiba.co.jp> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Smita, Smita Koralahalli writes: > Linux Kernel uses ACPI Boot Error Record Table (BERT) to report fatal > errors that occurred in a previous boot. The MCA errors in the BERT are > reported using the x86 Processor Error Common Platform Error Record (CPER) > format. Currently, the record prints out the raw MSR values and AMD relies > on the raw record to provide MCA information. > > Extract the raw MSR values of MCA registers from the BERT and feed it into > the standard mce_log() function through the existing x86/MCA RAS > infrastructure. This will result in better decoding from the EDAC MCE > decoder or the default notifier. > > The implementation is SMCA specific as the raw MCA register values are > given in the register offset order of the MCAX address space. > > [ Fix a build breakage in patch v1. ] > Reported-by: kernel test robot > Signed-off-by: Smita Koralahalli [...] > diff --git a/drivers/firmware/efi/cper-x86.c b/drivers/firmware/efi/cper-x86.c > index 2531de49f56c..438ed9eff6d0 100644 > --- a/drivers/firmware/efi/cper-x86.c > +++ b/drivers/firmware/efi/cper-x86.c > @@ -2,6 +2,7 @@ > // Copyright (C) 2018, Advanced Micro Devices, Inc. > > #include > +#include Did you mean to include ? > > /* > * We don't need a "CPER_IA" prefix since these are all locally defined. > @@ -347,9 +348,13 @@ void cper_print_proc_ia(const char *pfx, const struct cper_sec_proc_ia *proc) > ctx_info->mm_reg_addr); > } > > - printk("%sRegister Array:\n", newpfx); > - print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, groupsize, > - (ctx_info + 1), ctx_info->reg_arr_size, 0); > + if (ctx_info->reg_ctx_type != CTX_TYPE_MSR || > + arch_apei_report_x86_error(ctx_info, proc->lapic_id)) { > + printk("%sRegister Array:\n", newpfx); > + print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, > + groupsize, (ctx_info + 1), > + ctx_info->reg_arr_size, 0); > + } > > ctx_info = (struct cper_ia_proc_ctx *)((long)ctx_info + size); > } With that addressed, FWIW, Reviewed-by: Punit Agrawal Thanks, Punit