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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id s18sm632539pgh.60.2020.11.05.23.14.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2020 23:14:32 -0800 (PST) Date: Thu, 05 Nov 2020 23:14:32 -0800 (PST) X-Google-Original-Date: Thu, 05 Nov 2020 22:54:57 PST (-0800) Subject: Re: [RFC PATCH 1/3] RISC-V: Add Microchip PolarFire SoC kconfig option In-Reply-To: <20201028232759.1928479-2-atish.patra@wdc.com> CC: linux-kernel@vger.kernel.org, Atish Patra , aou@eecs.berkeley.edu, Alistair Francis , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Paul Walmsley , robh+dt@kernel.org, padmarao.begari@microchip.com, daire.mcnamara@microchip.com, Cyril.Jean@microchip.com From: Palmer Dabbelt To: Atish Patra Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 28 Oct 2020 16:27:57 PDT (-0700), Atish Patra wrote: > Add Microchip PolarFire kconfig option which selects SoC specific > and common drivers that is required for this SoC. > > Signed-off-by: Atish Patra > --- > arch/riscv/Kconfig.socs | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index 8a55f6156661..74d07250ecc5 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -22,6 +22,13 @@ config SOC_VIRT > help > This enables support for QEMU Virt Machine. > > +config SOC_MICROCHIP_POLARFIRE > + bool "Microchip PolarFire SoCs" > + select MCHP_CLK_PFSOC > + select SIFIVE_PLIC > + help > + This enables support for Microchip PolarFire SoC platforms. > + > config SOC_KENDRYTE > bool "Kendryte K210 SoC" > depends on !MMU Reviewed-by: Palmer Dabbelt