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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id f19sm782687pfa.82.2020.11.05.23.14.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2020 23:14:33 -0800 (PST) Date: Thu, 05 Nov 2020 23:14:33 -0800 (PST) X-Google-Original-Date: Thu, 05 Nov 2020 22:59:38 PST (-0800) Subject: Re: [RFC PATCH 3/3] RISC-V: Enable Microchip PolarFire ICICLE SoC In-Reply-To: <20201028232759.1928479-4-atish.patra@wdc.com> CC: linux-kernel@vger.kernel.org, Atish Patra , aou@eecs.berkeley.edu, Alistair Francis , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Paul Walmsley , robh+dt@kernel.org, padmarao.begari@microchip.com, daire.mcnamara@microchip.com, Cyril.Jean@microchip.com From: Palmer Dabbelt To: Atish Patra Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 28 Oct 2020 16:27:59 PDT (-0700), Atish Patra wrote: > Enable Microchip PolarFire ICICLE soc config in defconfig. > It allows the default upstream kernel to boot on PolarFire ICICLE board. I don't actually have one of these to test on yet. That said, if it boots for you then I don't really see any reason to delay this -- maybe there's some issues floating around, but I don't really see any reason to delay putting this on for-next. I'd even go so far as to say we should take it during the RCs, as so far it's just build/DT stuff. Given that this is currently the only production RISC-V Linux board I don't really any reason not to add it to the defconfigs. Is there a reason this is an RFC? > > Signed-off-by: Atish Patra > --- > arch/riscv/configs/defconfig | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > index d222d353d86d..2660fa05451e 100644 > --- a/arch/riscv/configs/defconfig > +++ b/arch/riscv/configs/defconfig > @@ -16,6 +16,7 @@ CONFIG_EXPERT=y > CONFIG_BPF_SYSCALL=y > CONFIG_SOC_SIFIVE=y > CONFIG_SOC_VIRT=y > +CONFIG_SOC_MICROCHIP_POLARFIRE=y > CONFIG_SMP=y > CONFIG_JUMP_LABEL=y > CONFIG_MODULES=y > @@ -79,6 +80,9 @@ CONFIG_USB_OHCI_HCD=y > CONFIG_USB_OHCI_HCD_PLATFORM=y > CONFIG_USB_STORAGE=y > CONFIG_USB_UAS=y > +CONFIG_SDHCI=y > +CONFIG_MMC_SDHCI_PLTFM=y > +CONFIG_MMC_SDHCI_CADENCE=y > CONFIG_MMC=y > CONFIG_MMC_SPI=y > CONFIG_RTC_CLASS=y Reviewed-by: Palmer Dabbelt