Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp3084123pxb; Mon, 9 Nov 2020 01:59:24 -0800 (PST) X-Google-Smtp-Source: ABdhPJz/IQYamDKl40ulhRxEHTzqudB88mXv8UFMO75C5RwoZ+IbUX811T2qXLFGicApSDAXJaVh X-Received: by 2002:aa7:d6c2:: with SMTP id x2mr14121095edr.206.1604915964307; Mon, 09 Nov 2020 01:59:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1604915964; cv=none; d=google.com; s=arc-20160816; b=Ddt6pdiEByP5Li0vsOMWFUqp4jpy0ZD85kwIwItw8ALg+TIBP5ADlkRWt/h9bveHT2 eSfQcSkw+a/PD2ZVF9oBySLYyOBcY0714VEOGTiIfaoyipIOIiALpashYgU/tTYD6LgL pxjflmjE4/ZR1jSwQ+2XMdapT87TYEjbqhAZyKtV6cdGxhETMpTxyF2umZl/U4DQOT95 aN0/ZhxHuOW7ivV3a6YmhmVLN5AqV4xBcWAV6TBOgDu6zsbgheuMUhHjdSMY1F774Ozn wMo5jHlewIXTbS8dw8C5DVPnrjvPjLKOlQNoLzYECUpruwt892mvDe6/Q4vdAMQLjgdN QbyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=163YOTfNVygpIrSd4jYwp8B0sdOWiDC8HyU6X6E9QOc=; b=uPmiYIzbtEWOK00CkhkrdN2YzcyzviCJcgXbw3VRUMSxUBY+xBKbk2CL8e0VK/jz8q XI7tjAmTk4ySXkqs77ui/ggVnq3ZiPYbmvhUaKk7CnI73obAE7t4q5OtZz/z7zTeXOBp jXvhD5Z3xRlxl8zUQrPUpvrm4eWluGqGd/UdW73z1Y8KfUCaqeju7s4LgNM/FxSggSxl UElUXrm2ckZzYLjlK7P38tLsLOHDJKsa33bzUkVIg5krcNWGeYpHRQ9brpstSLYxRv4d zYWlX/myLNbuUZ/+Ykkff8OCSyEloyvAxG1CRh9lKJxcF/A5ANUmr07VPDFno8qVtIIa 8oOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Im3rov7u; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c1si7077350edq.286.2020.11.09.01.59.02; Mon, 09 Nov 2020 01:59:24 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Im3rov7u; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729189AbgKIJ5P (ORCPT + 99 others); Mon, 9 Nov 2020 04:57:15 -0500 Received: from mail.kernel.org ([198.145.29.99]:33618 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727183AbgKIJ5P (ORCPT ); Mon, 9 Nov 2020 04:57:15 -0500 Received: from localhost (unknown [122.171.147.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E89C120789; Mon, 9 Nov 2020 09:57:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604915834; bh=160cLy5dwwK5xdEvDxpnSpt27mwIlmr3/ze0df37KOU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Im3rov7uw/cbSE48130Nx7NlwswXbw94RmzLqKbM1GYtAMxjvzxKjTg54dzIAxoZB Fh9Wu/uYSZ5GqfbVTnv8fH2rT2rgzeLDg5yPgFv96wM6LbjJXfX3LEfVVdpZX3afqx YGm8pTsnAanVOHGgxINGAGnKuVAVWdpkWbyUTagI= Date: Mon, 9 Nov 2020 15:27:10 +0530 From: Vinod Koul To: Sia Jee Heng Cc: Eugeniy.Paltsev@synopsys.com, andriy.shevchenko@linux.intel.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 12/15] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields Message-ID: <20201109095710.GF3171@vkoul-mobl> References: <20201027063858.4877-1-jee.heng.sia@intel.com> <20201027063858.4877-13-jee.heng.sia@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201027063858.4877-13-jee.heng.sia@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 27-10-20, 14:38, Sia Jee Heng wrote: > Add support for Intel KeemBay DMA registers. These registers are required > to run data transfer between device to memory and memory to device on Intel > KeemBay SoC. Again this should come first, you need to add all the bits required to support this soc and then add compatible.. -- ~Vinod