Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp3850714pxb; Tue, 10 Nov 2020 01:25:51 -0800 (PST) X-Google-Smtp-Source: ABdhPJzQzNtfviA1x92c9xUryLe+qaaacyQnhbemdE3UFRh4Lb7GVJWikZiLh8ikKAu8H1lNzJV/ X-Received: by 2002:a17:906:1902:: with SMTP id a2mr18483626eje.269.1605000350948; Tue, 10 Nov 2020 01:25:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605000350; cv=none; d=google.com; s=arc-20160816; b=jScalMbJQsm/tYo7TG5+/t2BeG7lxW2qti6eB3jV35ENTBANHrcJyPPdtNn1UPXWCX hIrlGr2+z5L9+/HZoSJuVAwVswl3c7+3WxNSmfSZrxZuCo9ebJiy42/B9jB6jfnS4EaP oK0VZ/wHvez0HxxuL1W3awklDKOjruxcy+TyBNA+v5xKlKKBi72hhUagGguAuOOnwAYE XtEHznJC8iMT8PwT6elQvVM+ykddWi+2hKmrDDFohEEffXkX00kQv8JORliP4AXXutha CpxMuxRCt/dGPw4UgXEvxPDsnw/FQFAApqWZTiUnGeA1+aeVnkHcibdGGcIjMwwg8Roj wfyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=7LnK+ZGqWjwxMBjlHELwijib3uQdIMAZ/MLriJjeeyw=; b=rZY8Tx0+VMjH6TjycMXvF9frKHjX0nD+7udCvwav9iFdSBNse+w6MTZUq/3OKinEru 9IOLj2aaSPoj3sEd8x00w5+AzVnxga8CotUnNzRs6vcsSoqDXY1HWvMp6sY1Vqva8JXR 3qysUeGRR0wiBsQnl/Yx/G0T8GadxnVRuEfMXBzmtq/DHb9dL305LeBLkjwXglj41euh D7jPE0SWykyVEsZlb5X4BJZ1GLua2927NPPDUkqSKJYhuZmpmqtcYWcCAJwYl6ooa8h3 /LYGGh4adcsoAozOnmVLDZekDrsfufdjwT72yj82hPdTjDnwXb2e9J55nMCDrVE7zI/M tlzQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q24si4325957eju.589.2020.11.10.01.25.26; Tue, 10 Nov 2020 01:25:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727483AbgKJJVd (ORCPT + 99 others); Tue, 10 Nov 2020 04:21:33 -0500 Received: from muru.com ([72.249.23.125]:47606 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726467AbgKJJVd (ORCPT ); Tue, 10 Nov 2020 04:21:33 -0500 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id CC1B180BA; Tue, 10 Nov 2020 09:21:36 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: Dave Gerlach , Faiz Abbas , Greg Kroah-Hartman , Grygorii Strashko , Keerthy , Nishanth Menon , Peter Ujfalusi , Roger Quadros , Suman Anna , Tero Kristo , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCHv2] bus: ti-sysc: Fix bogus resetdone warning on enable for cpsw Date: Tue, 10 Nov 2020 11:21:27 +0200 Message-Id: <20201110092127.46638-1-tony@atomide.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Bail out early from sysc_wait_softreset() just like we do in sysc_reset() if there's no sysstatus srst_shift to fix a bogus resetdone warning on enable as suggested by Grygorii Strashko . We do not currently handle resets for modules that need writing to the sysstatus register. If we at some point add that, we also need to add SYSS_QUIRK_RESETDONE_INVERTED flag for cpsw as the sysstatus bit is low when reset is done as described in the am335x TRM "Table 14-202 SOFT_RESET Register Field Descriptions" Fixes: d46f9fbec719 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit") Suggested-by: Grygorii Strashko Signed-off-by: Tony Lindgren --- Changes since v1: - Drop quirk handling and use fix suggested by Grygorii --- drivers/bus/ti-sysc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -227,6 +227,9 @@ static int sysc_wait_softreset(struct sysc *ddata) u32 sysc_mask, syss_done, rstval; int syss_offset, error = 0; + if (ddata->cap->regbits->srst_shift < 0) + return 0; + syss_offset = ddata->offsets[SYSC_SYSSTATUS]; sysc_mask = BIT(ddata->cap->regbits->srst_shift); -- 2.29.2