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[23.128.96.18]) by mx.google.com with ESMTP id y3si9791561edm.138.2020.11.10.05.36.21; Tue, 10 Nov 2020 05:36:44 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="eZsD/YY8"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730432AbgKJNcH (ORCPT + 99 others); Tue, 10 Nov 2020 08:32:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729908AbgKJNcH (ORCPT ); Tue, 10 Nov 2020 08:32:07 -0500 Received: from mail-lf1-x142.google.com (mail-lf1-x142.google.com [IPv6:2a00:1450:4864:20::142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78AD5C0613CF for ; Tue, 10 Nov 2020 05:32:05 -0800 (PST) Received: by mail-lf1-x142.google.com with SMTP id u18so17485312lfd.9 for ; Tue, 10 Nov 2020 05:32:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=il23hITCqpxK2KRgonKc+lZYY9qSqjOLZ5WOY5ud//k=; b=eZsD/YY8FuEfxVATHStyvm+EUySeSb5pDpxl2yI0vSyMxqVlz5O602Mqb6Ll03GRex B2JFyB4ps5kCym3tA0KpvBkxeisAgbh+8uu1BkHddSVGDWauHO6vZfNj0UitFncjBTSF VrLx3yV9+eJvPBu109zvRX/W0ypnyNbMXQsJo9VYqrt//VxjhfrfbcZ8bK6JDqr5INbd OEFQgPSoHcSp0zOL0vp52Az2ds0NG7GUdkB/QhG1mc0Gy3R1nD26B9TW6UiG7oXZJSSm ewiKW1Mti/Nj4Jfumj7rQIjn9IxDfqSju5xthPR88Tl94HrXEhJdLQ2GOPv3o93gFshU Lx1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=il23hITCqpxK2KRgonKc+lZYY9qSqjOLZ5WOY5ud//k=; b=RMe9weps8ncVASL7mTBk1c6ecFDzTiTE3szfy6E+y94CFONK87e46mGg/WlszxBCln 3ZzJ9jh5wcKu63/Z6qqeDi2U5NJ0Wj2NCCflhr+uIPrZRsKbx+i3jIhgIAEZlF+Leitp +CP9s8V8v8Jm/DMLbFF/mHWGDxxPbEUs0IIw1SM8fh3AKq3oN8kt+ZFlJJhAxjmus9jy m292s3Wcvx/AGloFZynaYWUoE0meSpvNTqdhCFV8XtDdYjOouBiqVABiSSjgVOaq99gq jxr6uLIMWxrmJQVIUkmgVlvUHJ7dCEuOHX1kPtXKJc0REs0TlJ3KVzbd17c92+CjHG+s Y4Kw== X-Gm-Message-State: AOAM530HnZkmVAgPcCzLe0TfPhk96UnsXeIPg3IKaBL8xsVPAnUOVo+A 6XVMOXQnHRCiFNm0EZJtvBE8J5eRMzEG+3158FfQAA== X-Received: by 2002:a19:5e0b:: with SMTP id s11mr6921684lfb.502.1605015123992; Tue, 10 Nov 2020 05:32:03 -0800 (PST) MIME-Version: 1.0 References: <1604561884-10166-1-git-send-email-mkshah@codeaurora.org> In-Reply-To: <1604561884-10166-1-git-send-email-mkshah@codeaurora.org> From: Linus Walleij Date: Tue, 10 Nov 2020 14:31:53 +0100 Message-ID: Subject: Re: [PATCH] pinctrl: qcom: Move clearing pending IRQ to .irq_request_resources callback To: Maulik Shah , Bjorn Andersson Cc: Andy Gross , "linux-kernel@vger.kernel.org" , MSM , "open list:GPIO SUBSYSTEM" , =?UTF-8?Q?open_list=3AGPIO_SUBSYSTEM_=3Clinux=2Dgpio=40vger=2Ekernel=2Eorg=3E=2C_Andy_?= =?UTF-8?Q?Gross_=3Cagross=40kernel=2Eorg=3E=2C_Thomas_Gleixner_=3Ctglx=40linutronix=2E?= =?UTF-8?Q?de=3E=2C_Jason_Cooper_=3Cjason=40lakedaemon=2Enet=3E=2C_Doug_Anderson_=3Cdia?= =?UTF-8?Q?nders=40chromium=2Eorg=3E=2C_Rajendra_Nayak_=3Crnayak=40codeaurora=2Eorg=3E=2C?= =?UTF-8?Q?_Lina_Iyer_=3Cilina=40codeaurora=2Eorg=3E=2C?= , Stephen Boyd , Evan Green , Matthias Kaehlcke , Rajendra Nayak , Lina Iyer , =?UTF-8?Q?open_list=3AGPIO_SUBSYSTEM_=3Clinux=2Dgpio=40vger=2Ekernel=2Eorg=3E=2C_Andy_?= =?UTF-8?Q?Gross_=3Cagross=40kernel=2Eorg=3E=2C_Thomas_Gleixner_=3Ctglx=40linutronix=2E?= =?UTF-8?Q?de=3E=2C_Jason_Cooper_=3Cjason=40lakedaemon=2Enet=3E=2C_Doug_Anderson_=3Cdia?= =?UTF-8?Q?nders=40chromium=2Eorg=3E=2C_Rajendra_Nayak_=3Crnayak=40codeaurora=2Eorg=3E=2C?= =?UTF-8?Q?_Lina_Iyer_=3Cilina=40codeaurora=2Eorg=3E=2C?= Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 5, 2020 at 8:38 AM Maulik Shah wrote: > When GPIOs that are routed to PDC are used as output they can still latch > the IRQ pending at GIC. As a result the spurious IRQ was handled when the > client driver change the direction to input to starts using it as IRQ. > > Currently such erroneous latched IRQ are cleared with .irq_enable callback > however if the driver continue to use GPIO as interrupt and invokes > disable_irq() followed by enable_irq() then everytime during enable_irq() > previously latched interrupt gets cleared. > > This can make edge IRQs not seen after enable_irq() if they had arrived > after the driver has invoked disable_irq() and were pending at GIC. > > Move clearing erroneous IRQ to .irq_request_resources callback as this is > the place where GPIO direction is changed as input and its locked as IRQ. > > While at this add a missing check to invoke msm_gpio_irq_clear_unmask() > from .irq_enable callback only when GPIO is not routed to PDC. > > Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") > Signed-off-by: Maulik Shah This looks critical so I applied it for fixes so we get some rotation in linux-next. If Bjorn has other opinions he will tell us :) Yours, Linus Walleij