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Subject: Re: [EXTERNAL] [tip: x86/apic] x86/io_apic: Cleanup trigger/polarity
 helpers
To:     Thomas Gleixner <tglx@linutronix.de>,
        David Woodhouse <dwmw2@infradead.org>,
        Borislav Petkov <bp@alien8.de>
Cc:     linux-kernel@vger.kernel.org, x86 <x86@kernel.org>,
        Qian Cai <cai@redhat.com>, Joerg Roedel <joro@8bytes.org>
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From:   Tom Lendacky <thomas.lendacky@amd.com>
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Date:   Tue, 10 Nov 2020 17:05:47 -0600
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On 11/10/20 4:48 PM, Thomas Gleixner wrote:
> On Tue, Nov 10 2020 at 16:00, Tom Lendacky wrote:
>> On 11/10/20 3:30 PM, David Woodhouse wrote:
>> [   15.581115] WARNING: CPU: 6 PID: 1 at arch/x86/kernel/apic/apic.c:2527 __irq_msi_compose_msg+0x9f/0xb0
>> [   15.581115] Call Trace:
>> [   15.581115]  irq_msi_update_msg+0x4d/0x80
>> [   15.581115]  msi_set_affinity+0x160/0x190
> 
> Duh. Yes, that want's some love as well. Delta patch below.
> 
> Thanks,
> 
>         tglx

That fixed it.

Thanks,
Tom

> ---
> --- a/arch/x86/kernel/apic/msi.c
> +++ b/arch/x86/kernel/apic/msi.c
> @@ -24,10 +24,11 @@ struct irq_domain *x86_pci_msi_default_d
>  
>  static void irq_msi_update_msg(struct irq_data *irqd, struct irq_cfg *cfg)
>  {
> +	struct irq_chip *chip = irq_data_get_irq_chip(irqd);
>  	struct msi_msg msg[2] = { [1] = { }, };
>  
> -	__irq_msi_compose_msg(cfg, msg, false);
> -	irq_data_get_irq_chip(irqd)->irq_write_msi_msg(irqd, msg);
> +	__irq_msi_compose_msg(cfg, msg, chip->flags & IRQCHIP_MSI_EXTID);
> +	chip->irq_write_msi_msg(irqd, msg);
>  }
>  
>  static int
> @@ -271,7 +272,7 @@ static struct irq_chip iommu_msi_control
>  	.irq_retrigger		= irq_chip_retrigger_hierarchy,
>  	.irq_set_affinity	= msi_set_affinity,
>  	.irq_compose_msi_msg	= iommu_msi_compose_msg,
> -	.flags			= IRQCHIP_SKIP_SET_WAKE,
> +	.flags			= IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MSI_EXTID,
>  };
>  
>  static struct msi_domain_info iommu_msi_domain_info = {
> @@ -310,7 +311,7 @@ static struct irq_chip dmar_msi_controll
>  	.irq_retrigger		= irq_chip_retrigger_hierarchy,
>  	.irq_compose_msi_msg	= iommu_msi_compose_msg,
>  	.irq_write_msi_msg	= dmar_msi_write_msg,
> -	.flags			= IRQCHIP_SKIP_SET_WAKE,
> +	.flags			= IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MSI_EXTID,
>  };
>  
>  static int dmar_msi_init(struct irq_domain *domain,
> --- a/include/linux/irq.h
> +++ b/include/linux/irq.h
> @@ -567,6 +567,8 @@ struct irq_chip {
>   * IRQCHIP_SUPPORTS_NMI:              Chip can deliver NMIs, only for root irqchips
>   * IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND:  Invokes __enable_irq()/__disable_irq() for wake irqs
>   *                                    in the suspend path if they are in disabled state
> + * IRQCHIP_MSI_EXTID		      The MSI message created for this chip can
> + *				      have an otherwise forbidden extended ID
>   */
>  enum {
>  	IRQCHIP_SET_TYPE_MASKED			= (1 <<  0),
> @@ -579,6 +581,7 @@ enum {
>  	IRQCHIP_SUPPORTS_LEVEL_MSI		= (1 <<  7),
>  	IRQCHIP_SUPPORTS_NMI			= (1 <<  8),
>  	IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND	= (1 <<  9),
> +	IRQCHIP_MSI_EXTID			= (1 << 10),
>  };
>  
>  #include <linux/irqdesc.h>
>