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[209.85.167.50]) by smtp.gmail.com with ESMTPSA id y6sm41296lfc.235.2020.11.10.16.04.34 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Nov 2020 16:04:34 -0800 (PST) Received: by mail-lf1-f50.google.com with SMTP id l2so742145lfk.0 for ; Tue, 10 Nov 2020 16:04:34 -0800 (PST) X-Received: by 2002:a19:408b:: with SMTP id n133mr8002533lfa.564.1605053074001; Tue, 10 Nov 2020 16:04:34 -0800 (PST) MIME-Version: 1.0 References: <20201110144932.1.I54a30ec0a7eb1f1b791dc9d08d5e8416a1e8e1ef@changeid> In-Reply-To: From: Evan Green Date: Tue, 10 Nov 2020 16:03:57 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] pinctrl: intel: Fix Jasperlake hostown offset To: Andy Shevchenko Cc: Andy Shevchenko , "stable@vger.kernel.org" , Linus Walleij , Mika Westerberg , "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Nov 10, 2020 at 3:48 PM Andy Shevchenko wrote: > > > > On Wednesday, November 11, 2020, Evan Green wrote: >> >> GPIOs that attempt to use interrupts get thwarted with a message like: >> "pin 161 cannot be used as IRQ" (for instance with SD_CD). This is becau= se >> the JSL_HOSTSW_OWN offset is incorrect, so every GPIO looks like it's >> owned by ACPI. > > > Funny, I have created a similar patch few hours ago. Are you sure this is= enough? In mine I have also padcfglock updated. But I have to confirm that= , that=E2=80=99s why I didn=E2=80=99t send it out. Oh weird! I didn't check padcfglock since it didn't happen to be involved in the bug I was tracking down. I was trying to clean out some skeletons in my kernel closet [1] and debugged it down to this. If you want to smash the two patches together I'm fine with that. Let me know, and CC me if you do post something. -Evan [1] https://chromium.googlesource.com/chromiumos/overlays/board-overlays/+/= master/overlay-dedede/sys-kernel/chromeos-kernel-5_4/files/0001-CHROMIUM-pi= nctrl-intel-Allow-pin-as-IRQ-even-in-ACPI.patch