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Peter Anvin" , X86 ML , Dave Hansen , Peter Zijlstra , LKML , Tom Lendacky , Joerg Roedel , Konrad Rzeszutek Wilk , jan.setjeeilers@oracle.com, Junaid Shahid , oweisse@google.com, Mike Rapoport , Alexander Graf , mgross@linux.intel.com, kuzuno@gmail.com References: <20201109144425.270789-1-alexandre.chartre@oracle.com> <20201109144425.270789-14-alexandre.chartre@oracle.com> From: Alexandre Chartre Message-ID: Date: Wed, 11 Nov 2020 09:55:27 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9801 signatures=668682 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxscore=0 spamscore=0 malwarescore=0 adultscore=0 phishscore=0 bulkscore=0 mlxlogscore=999 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2011110048 X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9801 signatures=668682 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 priorityscore=1501 mlxscore=0 suspectscore=0 mlxlogscore=999 lowpriorityscore=0 spamscore=0 malwarescore=0 adultscore=0 clxscore=1015 bulkscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2011110048 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/11/20 12:39 AM, Andy Lutomirski wrote: >> >> On 11/9/20 6:28 PM, Andy Lutomirski wrote: >>> On Mon, Nov 9, 2020 at 3:22 AM Alexandre Chartre >>> wrote: >>>> >>>> Extend PTI user mappings so that more kernel entry code can be executed >>>> with the user page-table. To do so, we need to map syscall and interrupt >>>> entry code, >>> >>> Probably fine. >>> >>>> per cpu offsets (__per_cpu_offset, which is used some in >>>> entry code), >>> >>> This likely already leaks due to vulnerable CPUs leaking address space >>> layout info. >> >> I forgot to update the comment, I am not mapping __per_cpu_offset anymore. >> >> However, if we do map __per_cpu_offset then we don't need to enforce the >> ordering in paranoid_entry to switch CR3 before GS. > > I'm okay with mapping __per_cpu_offset. > Good. That way I can move the GS update back to assembly code (paranoid_entry/exit will be mostly reduce to updating GS), and probably I won't need to disable stack-protector. >>> >>>> the stack canary, >>> >>> That's going to be a very tough sell. >>> >> >> I can get rid of this, but this will require to disable stack-protector for >> any function that we can call while using the user page-table, like already >> done in patch 21 (x86/entry: Disable stack-protector for IST entry C handlers). >> > > You could probably get away with using a different stack protector > canary before and after the CR3 switch as long as you are careful to > have the canary restored when you return from whatever function is > involved. > I was thinking about doing that. I will give it a try. Thanks, alex.