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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id 186sm751073ooe.20.2020.11.11.12.28.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Nov 2020 12:28:48 -0800 (PST) Received: (nullmailer pid 1974454 invoked by uid 1000); Wed, 11 Nov 2020 20:28:47 -0000 Date: Wed, 11 Nov 2020 14:28:47 -0600 From: Rob Herring To: Daniel Palmer Cc: maz@kernel.org, linux-kernel@vger.kernel.org, linus.walleij@linaro.org, soc@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, w@1wt.eu, linux-gpio@vger.kernel.org Subject: Re: [PATCH v3 1/5] dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver Message-ID: <20201111202847.GA1974400@bogus> References: <20201109121731.1537580-1-daniel@0x0f.com> <20201109121731.1537580-2-daniel@0x0f.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201109121731.1537580-2-daniel@0x0f.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 09 Nov 2020 21:17:27 +0900, Daniel Palmer wrote: > Header adds defines for the gpio number of each pad from the driver view. > > The gpio block seems to have enough registers for 128 lines but what line > is mapped to a physical pin depends on the chip. The gpio block also seems > to contain some registers that are not related to gpio but needed somewhere > to go. > > Because of the above the driver itself uses the index of a pin's offset in > an array of the possible offsets for a chip as the gpio number. > > Signed-off-by: Daniel Palmer > --- > MAINTAINERS | 1 + > include/dt-bindings/gpio/msc313-gpio.h | 53 ++++++++++++++++++++++++++ > 2 files changed, 54 insertions(+) > create mode 100644 include/dt-bindings/gpio/msc313-gpio.h > Reviewed-by: Rob Herring