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Peter Anvin" , Joerg Roedel , Bjorn Helgaas , Jon Derrick , YueHaibing , "Gustavo A. R. Silva" Subject: Re: [PATCH v2 16/17] x86/ioapic: export a few functions and data structures via io_apic.h Message-ID: <20201112113919.rfjwzauro5nk65ju@liuwe-devbox-debian-v2> References: <20201105165814.29233-1-wei.liu@kernel.org> <20201105165814.29233-17-wei.liu@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201105165814.29233-17-wei.liu@kernel.org> User-Agent: NeoMutt/20180716 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 05, 2020 at 04:58:13PM +0000, Wei Liu wrote: > We are about to implement an irqchip for IO-APIC when Linux runs as root > on Microsoft Hypervisor. At the same time we would like to reuse > existing code as much as possible. > > Move mp_chip_data to io_apic.h and make a few helper functions > non-static. > > No functional change. > > Signed-off-by: Wei Liu x86 maintainers, any comment on this patch? This is the only patch in this series that's not MSHV specific. Wei. > --- > arch/x86/include/asm/io_apic.h | 21 +++++++++++++++++++++ > arch/x86/kernel/apic/io_apic.c | 28 +++++++++------------------- > 2 files changed, 30 insertions(+), 19 deletions(-) > > diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h > index a1a26f6d3aa4..1375983a6028 100644 > --- a/arch/x86/include/asm/io_apic.h > +++ b/arch/x86/include/asm/io_apic.h > @@ -152,6 +152,15 @@ extern unsigned long io_apic_irqs; > #define io_apic_assign_pci_irqs \ > (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs) > > +struct mp_chip_data { > + struct list_head irq_2_pin; > + struct IO_APIC_route_entry entry; > + int trigger; > + int polarity; > + u32 count; > + bool isa_irq; > +}; > + > struct irq_cfg; > extern void ioapic_insert_resources(void); > extern int arch_early_ioapic_init(void); > @@ -195,6 +204,18 @@ extern void clear_IO_APIC(void); > extern void restore_boot_irq_mode(void); > extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin); > extern void print_IO_APICs(void); > + > +struct irq_data; > +extern struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin); > +extern void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e); > +extern void mask_ioapic_irq(struct irq_data *irq_data); > +extern void unmask_ioapic_irq(struct irq_data *irq_data); > +extern int ioapic_set_affinity(struct irq_data *irq_data, const struct cpumask *mask, bool force); > +extern struct irq_domain *mp_ioapic_irqdomain(int ioapic); > +enum irqchip_irq_state; > +extern int ioapic_irq_get_chip_state(struct irq_data *irqd, > + enum irqchip_irq_state which, > + bool *state); > #else /* !CONFIG_X86_IO_APIC */ > > #define IO_APIC_IRQ(x) 0 > diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c > index 7b3c7e0d4a09..23047f98b5e4 100644 > --- a/arch/x86/kernel/apic/io_apic.c > +++ b/arch/x86/kernel/apic/io_apic.c > @@ -88,15 +88,6 @@ struct irq_pin_list { > int apic, pin; > }; > > -struct mp_chip_data { > - struct list_head irq_2_pin; > - struct IO_APIC_route_entry entry; > - int trigger; > - int polarity; > - u32 count; > - bool isa_irq; > -}; > - > struct mp_ioapic_gsi { > u32 gsi_base; > u32 gsi_end; > @@ -154,7 +145,7 @@ static inline bool mp_is_legacy_irq(int irq) > return irq >= 0 && irq < nr_legacy_irqs(); > } > > -static inline struct irq_domain *mp_ioapic_irqdomain(int ioapic) > +struct irq_domain *mp_ioapic_irqdomain(int ioapic) > { > return ioapics[ioapic].irqdomain; > } > @@ -301,7 +292,7 @@ static struct IO_APIC_route_entry __ioapic_read_entry(int apic, int pin) > return eu.entry; > } > > -static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin) > +struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin) > { > union entry_union eu; > unsigned long flags; > @@ -328,7 +319,7 @@ static void __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e > io_apic_write(apic, 0x10 + 2*pin, eu.w1); > } > > -static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) > +void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) > { > unsigned long flags; > > @@ -453,7 +444,7 @@ static void io_apic_sync(struct irq_pin_list *entry) > readl(&io_apic->data); > } > > -static void mask_ioapic_irq(struct irq_data *irq_data) > +void mask_ioapic_irq(struct irq_data *irq_data) > { > struct mp_chip_data *data = irq_data->chip_data; > unsigned long flags; > @@ -468,7 +459,7 @@ static void __unmask_ioapic(struct mp_chip_data *data) > io_apic_modify_irq(data, ~IO_APIC_REDIR_MASKED, 0, NULL); > } > > -static void unmask_ioapic_irq(struct irq_data *irq_data) > +void unmask_ioapic_irq(struct irq_data *irq_data) > { > struct mp_chip_data *data = irq_data->chip_data; > unsigned long flags; > @@ -1868,8 +1859,7 @@ static void ioapic_configure_entry(struct irq_data *irqd) > __ioapic_write_entry(entry->apic, entry->pin, mpd->entry); > } > > -static int ioapic_set_affinity(struct irq_data *irq_data, > - const struct cpumask *mask, bool force) > +int ioapic_set_affinity(struct irq_data *irq_data, const struct cpumask *mask, bool force) > { > struct irq_data *parent = irq_data->parent_data; > unsigned long flags; > @@ -1898,9 +1888,9 @@ static int ioapic_set_affinity(struct irq_data *irq_data, > * > * Verify that the corresponding Remote-IRR bits are clear. > */ > -static int ioapic_irq_get_chip_state(struct irq_data *irqd, > - enum irqchip_irq_state which, > - bool *state) > +int ioapic_irq_get_chip_state(struct irq_data *irqd, > + enum irqchip_irq_state which, > + bool *state) > { > struct mp_chip_data *mcd = irqd->chip_data; > struct IO_APIC_route_entry rentry; > -- > 2.20.1 >