Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp321032pxb; Thu, 12 Nov 2020 04:54:06 -0800 (PST) X-Google-Smtp-Source: ABdhPJzo9aDM1U2EIM2M9H6HbSM8I8Ivivw3R1fs8H4CD9gbwo8mq7+St/2/oIU7BFhxK+PE0SPj X-Received: by 2002:a17:906:f744:: with SMTP id jp4mr29700864ejb.122.1605185646377; Thu, 12 Nov 2020 04:54:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605185646; cv=none; d=google.com; s=arc-20160816; b=ya+sWD685C6r7u/onLtUbGG1Qhom+Hbx1VvpkFaULhLZ/9NfAOAu5T/MLUHGhwM4A7 yBpRk7dWKdYGxPiULtA4KCB2dEvWR23kpn8ze/mbt6R/42cHBXVHLn5UF+E0qhzGKx+i /MEDCBEeR9hbojn5TNgmYe0VY1/4FbJd8HR3ZYk23nDyb9eaM8dTxFDlc7RhitIpvp7s b8uiskNgaiVjzWUyfjb+du09h8x7aq5xMMJAnEc77kGDi3Z5SvoUB7tdbwuV2rJv3kiJ 2Km58HtQJCGxHJA0GhsqwOdG/9STQG27aOW/fIZdrDKXVxiIjeCwlurLYedaS5g49cB9 K2sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:dkim-signature:content-transfer-encoding :mime-version:message-id:date:subject:cc:to:from; bh=aUrF7mTyktNQ/LBkcSGmc6+2uSxejCTBWAPuhk1LS7U=; b=ky2tbfWqXjWIXLGRZw8m9BKuSoHgUGaOcBdUmTxI3yWa2DG9+WbBh+BKpT6m5UmY66 mLCoUyAo2Ki8uzTn94kBHOjyORmuhZcRUE8UF46P5P+QRc1jTSrQ7N96Lw/JQQ6svYfn wPmjj6VqfNSm6ZSv1Tgygv5fy444nsytn85cl2UZJKV2KNhwJ68MjKFIgmTN8lcKUOwI EQ1gPXJpk1CrV8UKb0KPR/dUX1wPR0X9v8H4cxBCU9vpeGKaI0ROTntLaHoBwkw4rj8/ VDn9tsFPU+/gGhXO1OGulmdy26dcxGjETp0sB5LvRS+/7sQ5LQGhgRzeEr3LI5xixsqu W2gw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=oU4bKU7T; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h4si3808332edq.579.2020.11.12.04.53.43; Thu, 12 Nov 2020 04:54:06 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=oU4bKU7T; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727909AbgKLMwQ (ORCPT + 99 others); Thu, 12 Nov 2020 07:52:16 -0500 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:1158 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727223AbgKLMwP (ORCPT ); Thu, 12 Nov 2020 07:52:15 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Thu, 12 Nov 2020 04:52:09 -0800 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 12 Nov 2020 12:52:14 +0000 Received: from moonraker.nvidia.com (10.124.1.5) by mail.nvidia.com (172.20.187.12) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Thu, 12 Nov 2020 12:52:13 +0000 From: Jon Hunter To: Rob Herring , Thierry Reding CC: , , , Jon Hunter , Subject: [PATCH V2] ARM: tegra: Populate OPP table for Tegra20 Ventana Date: Thu, 12 Nov 2020 12:52:10 +0000 Message-ID: <20201112125210.214517-1-jonathanh@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1605185529; bh=aUrF7mTyktNQ/LBkcSGmc6+2uSxejCTBWAPuhk1LS7U=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:MIME-Version: X-NVConfidentiality:Content-Transfer-Encoding:Content-Type; b=oU4bKU7TkhZrj5fkR5hnqStyziypBOn+zoYfIgJTjmr7Lh72NEwx6nlSCFgZJU+Ki 72Xn8yTFCyKm1wlYD85pAWHIyzaGwxPGLUfBYZqjSFGM/6XlEKyIaFQ2a35E1vmYB+ 5xVqxj8pC8pJ681maWMvsZ4zBGjah7mBGx4/FFINdfaIfWZFMsgD+PhQG8OD6cg1W8 KRsUsj/XsTKylV6BEXAuUyJeT+FMsomLvYQvLnSNRe1WT829IO/whqQGw6UCkdGN/w mWiYgd1KfL47xBc+yCH2Kxw6Tcyg/4k3kF2UtHu8RzQBxo4AqkBwo+sbiCV9+mEkjK he3ZTTD9V1ITw== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)") update the Tegra20 CPUFREQ driver to use the generic CPUFREQ device-tree driver. Since this change CPUFREQ support on the Tegra20 Ventana platform has been broken because the necessary device-tree nodes with the operating point information are not populated for this platform. Fix this by updating device-tree for Venata to include the operating point informration for Tegra20. Fixes: 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegr= a30 supported now)") Cc: stable@vger.kernel.org Signed-off-by: Jon Hunter --- Changes since V1: - Remove unneeded 'cpu0' phandle arch/arm/boot/dts/tegra20-ventana.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegr= a20-ventana.dts index b158771ac0b7..1b2a0dcd929a 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts @@ -3,6 +3,7 @@ =20 #include #include "tegra20.dtsi" +#include "tegra20-cpu-opp.dtsi" =20 / { model =3D "NVIDIA Tegra20 Ventana evaluation board"; @@ -592,6 +593,16 @@ clk32k_in: clock@0 { #clock-cells =3D <0>; }; =20 + cpus { + cpu@0 { + operating-points-v2 =3D <&cpu0_opp_table>; + }; + + cpu@1 { + operating-points-v2 =3D <&cpu0_opp_table>; + }; + }; + gpio-keys { compatible =3D "gpio-keys"; =20 --=20 2.25.1