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Subject: Re: [PATCH v2 7/7] arm64: dts: ti: k3-j7200-common-proc-board: Enable
 PCIe
To:     Kishon Vijay Abraham I <kishon@ti.com>,
        Tero Kristo <t-kristo@ti.com>, Nishanth Menon <nm@ti.com>,
        Rob Herring <robh+dt@kernel.org>,
        Roger Quadros <rogerq@ti.com>, Lee Jones <lee.jones@linaro.org>
CC:     <devicetree@vger.kernel.org>, <linux-pci@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>,
        Bjorn Helgaas <bhelgaas@google.com>,
        <linux-arm-kernel@lists.infradead.org>
References: <20201109170409.4498-1-kishon@ti.com>
 <20201109170409.4498-8-kishon@ti.com>
From:   Vignesh Raghavendra <vigneshr@ti.com>
Message-ID: <40cc8bd1-54c0-54de-6f4d-f20ad4f90164@ti.com>
Date:   Thu, 12 Nov 2020 21:26:45 +0530
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On 11/9/20 10:34 PM, Kishon Vijay Abraham I wrote:
> x2 lane PCIe slot in the common processor board is enabled and connected to
> j7200 SOM. Add PCIe DT node in common processor board to reflect the
> same.
> 
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---

Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>

>  .../boot/dts/ti/k3-j7200-common-proc-board.dts    | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> index 65a2e5aeb050..174a55a18522 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> @@ -6,6 +6,7 @@
>  /dts-v1/;
>  
>  #include "k3-j7200-som-p0.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/net/ti-dp83867.h>
>  #include <dt-bindings/mux/ti-serdes.h>
>  #include <dt-bindings/phy/phy.h>
> @@ -236,3 +237,17 @@
>  		resets = <&serdes_wiz0 3>;
>  	};
>  };
> +
> +&pcie1_rc {
> +	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
> +	phys = <&serdes0_pcie_link>;
> +	phy-names = "pcie-phy";
> +	num-lanes = <2>;
> +};
> +
> +&pcie1_ep {
> +	phys = <&serdes0_pcie_link>;
> +	phy-names = "pcie-phy";
> +	num-lanes = <2>;
> +	status = "disabled";
> +};
>