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[23.128.96.18]) by mx.google.com with ESMTP id b10si4594852ejv.433.2020.11.12.14.42.41; Thu, 12 Nov 2020 14:43:04 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=MxkYQWOQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726526AbgKLWlQ (ORCPT + 99 others); Thu, 12 Nov 2020 17:41:16 -0500 Received: from mail.kernel.org ([198.145.29.99]:45380 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726221AbgKLWlQ (ORCPT ); Thu, 12 Nov 2020 17:41:16 -0500 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1A22022227 for ; Thu, 12 Nov 2020 22:41:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1605220875; bh=TIUppCALNwaHlE5rK5c0ydSZxnQCuBpff8wpCFgyPXE=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=MxkYQWOQvddFXoAbsK9WzGvltIHvSYyAImBjx/iqjmq5JPqQIJM5kJcT7E0gchjJ/ I40Tg/FhF8332GtfozRItHgnMgFWowQZksocAsig3rm3NnrlFHFwCI71t9jV6GSGPF lY2hTk2fOwnWmbP/NsAVZ9YR+jwNrhnKMZNeTRg4= Received: by mail-wm1-f50.google.com with SMTP id c9so6573840wml.5 for ; Thu, 12 Nov 2020 14:41:15 -0800 (PST) X-Gm-Message-State: AOAM5337BxjBpIz3XzzyB8zFZ+9vtWH+5o+ypiq0SYkMeAV/1YxW5Sqj u1q0q2YnZwtQPFWXrAqquTRPuyI6vr+TTPmoEBCPRA== X-Received: by 2002:a05:600c:22d3:: with SMTP id 19mr44938wmg.21.1605220872356; Thu, 12 Nov 2020 14:41:12 -0800 (PST) MIME-Version: 1.0 References: <20201104145430.300542-1-jarkko.sakkinen@linux.intel.com> <20201104145430.300542-11-jarkko.sakkinen@linux.intel.com> <20201106174359.GA24109@wind.enjellic.com> <20201107150930.GA29530@wind.enjellic.com> <20201112205819.GA9172@wind.enjellic.com> <5c22300c-0956-48ed-578d-00cf62cb5c09@intel.com> In-Reply-To: <5c22300c-0956-48ed-578d-00cf62cb5c09@intel.com> From: Andy Lutomirski Date: Thu, 12 Nov 2020 14:41:00 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v40 10/24] mm: Add 'mprotect' hook to struct vm_operations_struct To: Dave Hansen Cc: "Dr. Greg" , Jarkko Sakkinen , X86 ML , linux-sgx@vger.kernel.org, LKML , Sean Christopherson , Linux-MM , Andrew Morton , Matthew Wilcox , Jethro Beekman , Darren Kenny , Andy Shevchenko , asapek@google.com, Borislav Petkov , "Xing, Cedric" , chenalexchen@google.com, Conrad Parker , cyhanish@google.com, "Huang, Haitao" , "Huang, Kai" , "Svahn, Kai" , Keith Moyer , Christian Ludloff , Andrew Lutomirski , Neil Horman , Nathaniel McCallum , Patrick Uiterwijk , David Rientjes , Thomas Gleixner , yaozhangx@google.com, Mikko Ylinen Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 12, 2020 at 1:31 PM Dave Hansen wrote: > > On 11/12/20 12:58 PM, Dr. Greg wrote: > > @@ -270,11 +270,10 @@ static int sgx_vma_mprotect(struct vm_area_struct *vma, > > struct vm_area_struct **pprev, unsigned long start, > > unsigned long end, unsigned long newflags) > > { > > - int ret; > > + struct sgx_encl *encl = vma->vm_private_data; > > > > - ret = sgx_encl_may_map(vma->vm_private_data, start, end, newflags); > > - if (ret) > > - return ret; > > + if ( test_bit(SGX_ENCL_INITIALIZED, &encl->flags) ) > > + return -EACCES; > > > > return mprotect_fixup(vma, pprev, start, end, newflags); > > } > > This rules out mprotect() on running enclaves. Does that break any > expectations from enclave authors, or take away capabilities that folks > need? It certainly prevents any scheme in which an enclave coordinates with the outside world to do W-and-then-X JIT inside. I'm also not convinced it has any real effect at all unless there's some magic I missed to prevent someone from using mmap(2) to effectively change permissions. Everyone, IMO this SGX1 - vs - SGX2 - vs - EDMM discussion is entirely missing the point and is a waste of everyone's time. Let's pretend we're building a system that has nothing to do with SGX and requires no special hardware support at all. It works like this: A user program opens /dev/xyz and gets back an fd that represents 16 MB of memory. The user program copies some data from disk (or network or whatever) into fd (using write(2) or ioctl(2) or mmap(2) and memcpy) and then mmaps some of the fd as R and some as RW and some as RX, and then the user program jumps into the RX mapping. If we replace /dev/xyz with /dev/zero, then this simply does not work under a reasonably strict W^X policy -- a lot of people think it's quite reasonable for an OS to prevent a user program from obtaining an X mapping containing anything other than a mapping from a file on disk. To solve this, we can do one of at least three things: a) You can't use /dev/xyz unless you have permission to create WX memory or to at least create W memory and then change it to X. b) You can do whatever you want with /dev/xyz, and LSM policies are blatantly violated as a result. c) The /dev/xyz API is clever and tracks, page-by-page, whether the user intends to ever write and/or execute that page, and behaves accordingly. This patchset takes the approach (c). The actual clever policy isn't here yet, and we don't really know whether it will ever appear, but the API is set up to enable such a policy to be written. This appears to be a win for everyone, since the code is pretty clean and the API is straightforward. Now, back to SGX. There are only two things that are remotely SGX-specific here. First, SGX requires this unusual memory model in which there is an executable mapping of (part of) a device node. [0] Second, early SGX hardware had this oddity that the kernel could set a per-backing-page (as opposed to per-PTE) bit to permanently disable X on a given /dev/sgx page. Building a security model around that would have been a hack, and it DOES NOT WORK on new hardware. So can we please stop discussing it? None of the actual interesting parts of this have much to do with SGX per se and have nothing whatsoever to do with EDMM or any other Intel buzzword. Heck, if anyone actually cared to do so, something with essentially the same semantics could probably be built using SEV hardware instead of SGX, and it would have exactly the same issue if we wanted it to work for tasks that didn't have access to /dev/kvm. [0] SGX doesn't *really* require this. We could set things up so that you do mmap(..., MAP_ANONYMOUS, fd, ...) and then somehow introduce that mapping to SGX. I think the result would be too disgusting to seriously consider.