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[23.128.96.18]) by mx.google.com with ESMTP id ga10si4618712ejc.686.2020.11.12.21.34.45; Thu, 12 Nov 2020 21:35:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=h86+nsdj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726245AbgKMFdJ (ORCPT + 99 others); Fri, 13 Nov 2020 00:33:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726071AbgKMFdI (ORCPT ); Fri, 13 Nov 2020 00:33:08 -0500 Received: from mail-oi1-x244.google.com (mail-oi1-x244.google.com [IPv6:2607:f8b0:4864:20::244]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82FE2C0613D1; Thu, 12 Nov 2020 21:33:07 -0800 (PST) Received: by mail-oi1-x244.google.com with SMTP id m143so9238788oig.7; Thu, 12 Nov 2020 21:33:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=rzpHxVwtYfPNR5m+0xd40O02SiyxGAAISovudBzR/vE=; b=h86+nsdjF93+wDYVtajUVNvY26hefcNO04S+d0kH+aiRUmxn58HcQx5GtgRzTOZZg7 qtXZbq4JpNzvvjKAnjgzcujlx+yLhKxWysKxVUHdj9hcYpjHiwcYjfITQyblfLCd8BL2 d2bOfs2FEkwNBZGGGDYwInbsQp8GwLNv+BTmQ7vmL0XGShcy94/3LcblWZu0yr2DAOYm CAdnXuF54D7OuqAweTnyGlQhL7UMhXNdlcLjUWtg9CAtMYEqIn97G286HoczEHADNb/+ Leez1Sjob23y065wvBBKLehx4xhenW1CRkTCIzUZPa5aEFxJZX7x8ZLRUiAQpQiODjwe mk9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=rzpHxVwtYfPNR5m+0xd40O02SiyxGAAISovudBzR/vE=; b=Bn/v+Mf6rjUSU0EBKfgmtm2nh7RNdWINZ+Qq71ndnV/ftibuqZzivcECsyx56PMmfc NNU6nWGHm8OwyJhxYTJJ9ghdpHUBT1RwtYLeGprrwg1o+Wnlxsky+C8Vt8fLlgmYr8GW K17UieQuUqf4I2phT3NpaNamtXoHCfMg9AXLTfrzdvLNe3XvrFgHCIktiZDjjp9P/tFW JKfPc8VS+RFjfX/n585S66PNF93KAVtlXys14Uao9Vhfux49T80zYbiQeNMM3U4m2GdX j6G2QWexS8WX07DeVxUiIhvMEQse5dkfkWaxUUshklzLBB7Uhczy162LXboxpptMywvg usQw== X-Gm-Message-State: AOAM530hFQMus66crlDaEzYA6pIG2zwT1gSI9Y6x+JLU4r8GXbs6MLgZ a8BEz97Y+WX3YqDcMSVZFV6RStaly2la+tW6Fzw= X-Received: by 2002:aca:f407:: with SMTP id s7mr377123oih.23.1605245587028; Thu, 12 Nov 2020 21:33:07 -0800 (PST) MIME-Version: 1.0 References: <20201111163013.29412-1-sergio.paracuellos@gmail.com> In-Reply-To: From: Sergio Paracuellos Date: Fri, 13 Nov 2020 06:32:55 +0100 Message-ID: Subject: Re: [PATCH 0/7] MIPS: ralink: add CPU clock detection and clock gate driver for MT7621 To: Chuanhong Guo Cc: Michael Turquette , Stephen Boyd , Rob Herring , Thomas Bogendoerfer , John Crispin , Greg Kroah-Hartman , Weijie Gao , jiaxun.yang@flygoat.com, "open list:COMMON CLK FRAMEWORK" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list , "open list:MIPS" , "open list:STAGING SUBSYSTEM" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Nov 13, 2020 at 1:40 AM Chuanhong Guo wrote: > > On Thu, Nov 12, 2020 at 1:23 PM Sergio Paracuellos > wrote: > > > > To avoid weird behaviour because of some drivers are > > not using properly clocks we have the CLK_IGNORED_UNUSED, which as you > > can see is currently being used in my code. Using that all seems to > > work as expected as it is now. > > The whole point of having a clock gate driver is to gate unused > clocks to save (maybe a tiny bit of) power. It's other peripheral > drivers' fault that it doesn't enable clocks properly and we shouldn't > just work-around the problem in the clock driver by disallowing auto > clock gating. > Totally agreed with what you are saying here but I don't really think using the flag is a workaround. It is just a way to ensure no regressions occurred until all drivers are adapted and also having all of them enabled is the behaviour. For me adapt the rest of driver code should be a different patch set after this driver is properly finished and mainlined. > -- > Regards, > Chuanhong Guo Best regards, Sergio Paracuellos