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[118.13.124.123]) by smtp.googlemail.com with ESMTPSA id r205sm13008023pfr.25.2020.11.14.05.52.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Nov 2020 05:52:27 -0800 (PST) From: Daniel Palmer To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, w@1wt.eu, Daniel Palmer Subject: [PATCH 4/6] ARM: mstar: Select MSTAR_MSC313_MPLL Date: Sat, 14 Nov 2020 22:50:42 +0900 Message-Id: <20201114135044.724385-5-daniel@0x0f.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201114135044.724385-1-daniel@0x0f.com> References: <20201114135044.724385-1-daniel@0x0f.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org All of the ARCH_MSTARV7 chips have an MPLL as the source for peripheral clocks so select MSTAR_MSC313_MPLL. Signed-off-by: Daniel Palmer --- arch/arm/mach-mstar/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-mstar/Kconfig b/arch/arm/mach-mstar/Kconfig index 576d1ab293c8..cd300eeedc20 100644 --- a/arch/arm/mach-mstar/Kconfig +++ b/arch/arm/mach-mstar/Kconfig @@ -4,6 +4,7 @@ menuconfig ARCH_MSTARV7 select ARM_GIC select ARM_HEAVY_MB select MST_IRQ + select MSTAR_MSC313_MPLL help Support for newer MStar/Sigmastar SoC families that are based on Armv7 cores like the Cortex A7 and share the same -- 2.29.2