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[79.195.234.119]) by smtp.googlemail.com with ESMTPSA id i13sm9233520ejv.84.2020.11.15.10.52.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Nov 2020 10:52:43 -0800 (PST) From: Martin Blumenstingl To: davem@davemloft.net, kuba@kernel.org, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, robh+dt@kernel.org, netdev@vger.kernel.org Cc: jianxin.pan@amlogic.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, khilman@baylibre.com, narmstrong@baylibre.com, jbrunet@baylibre.com, andrew@lunn.ch, f.fainelli@gmail.com, Martin Blumenstingl Subject: [PATCH RFC v2 2/5] net: stmmac: dwmac-meson8b: fix enabling the timing-adjustment clock Date: Sun, 15 Nov 2020 19:52:07 +0100 Message-Id: <20201115185210.573739-3-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201115185210.573739-1-martin.blumenstingl@googlemail.com> References: <20201115185210.573739-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The timing-adjustment clock only has to be enabled when a) there is a 2ns RX delay configured using device-tree and b) the phy-mode indicates that the RX delay should be enabled. Only enable the RX delay if both are true, instead of (by accident) also enabling it when there's the 2ns RX delay configured but the phy-mode incicates that the RX delay is not used. Fixes: 9308c47640d515 ("net: stmmac: dwmac-meson8b: add support for the RX delay configuration") Reported-by: Andrew Lunn Signed-off-by: Martin Blumenstingl --- drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c index dc0b8b6d180d..e27e2e7a53fd 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c @@ -301,7 +301,7 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac) return -EINVAL; } - if (rx_dly_config & PRG_ETH0_ADJ_ENABLE) { + if (delay_config & PRG_ETH0_ADJ_ENABLE) { if (!dwmac->timing_adj_clk) { dev_err(dwmac->dev, "The timing-adjustment clock is mandatory for the RX delay re-timing\n"); -- 2.29.2