Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp2675617pxb; Sun, 15 Nov 2020 13:38:07 -0800 (PST) X-Google-Smtp-Source: ABdhPJx9tjzR7P67GKuCrrqOY67f/3r6EHrwsiBtuxxfvBQeVyqw0DY7iPoiVaiF8026e11fDsq8 X-Received: by 2002:a17:906:f286:: with SMTP id gu6mr12333106ejb.182.1605476286996; Sun, 15 Nov 2020 13:38:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605476286; cv=none; d=google.com; s=arc-20160816; b=z0SKUYqprtNMSABlhXfH+ATfBGIkiS9TDY86PBwkTUxtZusdVjyZcGThl2tSO/P3vp rwuu6XT8RPU5E0sUaPHHr5O0F4euwQXGcVTRsmbxzI/rbRDyiL3X/FUeveqcsB4LqdTO Bb3jl5ybSQx0Vl29xYcR11JCsFDlRPGTAOmgs2XftVDwWjSuJnDiP0seLTAqaJ+hkKqd KOg6RAI2ItC5FPY5vOxuFXYBMQOvwn5/GZS2o0wzy8YI32W1SxAGB3qrgZEOAjCAuqnb 8EYp4HhQr3Vmhr/5YwJJfUG2nQbdjWwISvV+7QMOyjhS7Bk8sBjlaGuPFlneg+3F+EvF 2Jrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=h8MxeHCuATJ53PU3I8a6+czrbv101Npis+Hx7wYKzuk=; b=uEd8josNrA0BUwTrxDXB1ifGoByaaxkHcSOrMyzyMXwUO0RV4+2WnOojeclgN/S6xu hrvWxiRi1wC8uCY+d3gmKOJO88lJc7xBdim8pC5314PHzRKT/BSpMfWHpNDv6RxBZJ/h 4dYqmODT/g/3pOgv+hsZwGxKZ7t9alOXd09ievkxhc5tzExUdHK5S4GY87wmMQ4VoEGz zUvhne7fGx7zFSgVz+OJLPjHxkT02LLcsEQCy7WUvMXGGxGlMOYzkMrEYB1YTtwa+QcD OuM8ActunGAJFUrmTYk7ewo3GEP4M69Vz2FiIKlR4nt8iSv+20jmLS+dmbt2r36YEA4r mIMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=E175ZaO5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id k7si11051853edr.388.2020.11.15.13.37.44; Sun, 15 Nov 2020 13:38:06 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=E175ZaO5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727657AbgKOVdS (ORCPT + 99 others); Sun, 15 Nov 2020 16:33:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727425AbgKOVdR (ORCPT ); Sun, 15 Nov 2020 16:33:17 -0500 Received: from mail-lf1-x143.google.com (mail-lf1-x143.google.com [IPv6:2a00:1450:4864:20::143]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 657CDC0613CF; Sun, 15 Nov 2020 13:33:17 -0800 (PST) Received: by mail-lf1-x143.google.com with SMTP id v144so22300520lfa.13; Sun, 15 Nov 2020 13:33:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=h8MxeHCuATJ53PU3I8a6+czrbv101Npis+Hx7wYKzuk=; b=E175ZaO5saZJgpUFcFDwuW78olO2XrOuQzlEEbEJg1BvpqE4a7qwch7OanQfFjeL4o ghVsnHGG13jbuGP89iiXo0M+uwar9l6qqtBQBxfY/C4A/+5km1O3bSZIjwXl9HAEPcRh ADTQTHcsJIRKE1UEXwho0rBcIjXBxzTfNTJ9U+LbdkzCJgRVj6nSx/OMuvLcoTRM6UGr ky7YVrZAaM5qB8gCYOudoT2zvTBtq5s2VJ1JGFpT7uhJJFs4QmsTf4+nMZxGNc3C88RE TWgoZ2FrtSFTXzFZHdKxXhZAeAzvFTXoT7sx8kmuhxhsKHnsFFAYOmt/BdAQtOd2TmLM Pt4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=h8MxeHCuATJ53PU3I8a6+czrbv101Npis+Hx7wYKzuk=; b=FYBdo2G243i8123gVSCT8IO1dN3SCWqRxdsSxTROP/gB7e8+txit8Rzh0l5TttObRt hXaMg8+Je4NWJVBGp36wqumUFdlxy8s2fXNfeEf01PutHdBmomxfCGIFNag6Qnu5F6k2 YH5vE84It0ynPfRaFbmRUmVLbzbD0pRwRHtIPPnZ4NqBPXDktitA6FV7U4q6wYiEs0FY Tcz3hcPfBqkhZi7GXCiDz0H+4w0o3tTvos1LaTtUs0ZR/MvgH8Chnk18f5l+STA/giZH nt/RngnGgHXlytZgTBFCnax9CamX0kHA1LabMnf4wfSE/lkCGFag1IUGSWF2l6wxsX2Z LIEQ== X-Gm-Message-State: AOAM530GaAQhMbBHwqcw7VgEf4oZpJwv4gLMJMWZu8JGfX+rxEGLVCr3 /p+usFGqKxhBPUy3zr2aTWtJeTfhf6Q= X-Received: by 2002:a19:c181:: with SMTP id r123mr4843928lff.335.1605475995788; Sun, 15 Nov 2020 13:33:15 -0800 (PST) Received: from localhost.localdomain (109-252-193-159.dynamic.spd-mgts.ru. [109.252.193.159]) by smtp.gmail.com with ESMTPSA id o3sm2462055lfo.217.2020.11.15.13.33.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Nov 2020 13:33:15 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen , Viresh Kumar , Peter Geis , Nicolas Chauvet , Krzysztof Kozlowski Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH v9 00/17] Introduce memory interconnect for NVIDIA Tegra SoCs Date: Mon, 16 Nov 2020 00:29:05 +0300 Message-Id: <20201115212922.4390-1-digetx@gmail.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series brings initial support for memory interconnect to Tegra20, Tegra30 and Tegra124 SoCs. For the starter only display controllers and devfreq devices are getting interconnect API support, others could be supported later on. The display controllers have the biggest demand for interconnect API right now because dynamic memory frequency scaling can't be done safely without taking into account bandwidth requirement from the displays. In particular this series fixes distorted display output on T30 Ouya and T124 TK1 devices. Changelog: v9: - Squashed "memory: tegra30-emc: Factor out clk initialization" into patch "tegra30: Support interconnect framework". Suggested by Krzysztof Kozlowski. - Improved Kconfig in the patch "memory: tegra124-emc: Make driver modular" by adding CONFIG_TEGRA124_CLK_EMC entry, which makes clk-driver changes to look a bit more cleaner. Suggested by Krzysztof Kozlowski. - Dropped voltage regulator support from ICC and DT patches for now because there is a new discussion about using a power domain abstraction for controlling the regulator, which is likely to happen. - Replaced direct "operating-points-v2" property checking in EMC drivers with checking of a returned error code from dev_pm_opp_of_add_table(). Note that I haven't touched T20 EMC driver because it's very likely that we'll replace that code with a common helper soon anyways. Suggested by Viresh Kumar. - The T30 DT patches now include EMC OPP changes for Ouya board, which is available now in linux-next. Dmitry Osipenko (17): memory: tegra30: Support interconnect framework memory: tegra124-emc: Make driver modular memory: tegra124-emc: Continue probing if timings are missing in device-tree memory: tegra124: Support interconnect framework drm/tegra: dc: Support memory bandwidth management drm/tegra: dc: Extend debug stats with total number of events PM / devfreq: tegra30: Support interconnect and OPPs from device-tree PM / devfreq: tegra30: Separate configurations per-SoC generation PM / devfreq: tegra20: Deprecate in a favor of emc-stat based driver ARM: tegra: Correct EMC registers size in Tegra20 device-tree ARM: tegra: Add interconnect properties to Tegra20 device-tree ARM: tegra: Add interconnect properties to Tegra30 device-tree ARM: tegra: Add interconnect properties to Tegra124 device-tree ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree ARM: tegra: Add EMC OPP properties to Tegra20 device-trees ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree nodes ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON device-tree nodes MAINTAINERS | 1 - arch/arm/boot/dts/tegra124-apalis-emc.dtsi | 8 + .../arm/boot/dts/tegra124-jetson-tk1-emc.dtsi | 8 + arch/arm/boot/dts/tegra124-nyan-big-emc.dtsi | 10 + .../arm/boot/dts/tegra124-nyan-blaze-emc.dtsi | 10 + .../boot/dts/tegra124-peripherals-opp.dtsi | 419 ++++++++++++++++++ arch/arm/boot/dts/tegra124.dtsi | 31 ++ .../boot/dts/tegra20-acer-a500-picasso.dts | 5 + arch/arm/boot/dts/tegra20-colibri.dtsi | 4 + arch/arm/boot/dts/tegra20-paz00.dts | 4 + .../arm/boot/dts/tegra20-peripherals-opp.dtsi | 92 ++++ arch/arm/boot/dts/tegra20.dtsi | 33 +- ...30-asus-nexus7-grouper-memory-timings.dtsi | 12 + arch/arm/boot/dts/tegra30-ouya.dts | 8 + .../arm/boot/dts/tegra30-peripherals-opp.dtsi | 383 ++++++++++++++++ arch/arm/boot/dts/tegra30.dtsi | 33 +- drivers/clk/tegra/Kconfig | 3 + drivers/clk/tegra/Makefile | 2 +- drivers/clk/tegra/clk-tegra124-emc.c | 41 +- drivers/clk/tegra/clk-tegra124.c | 26 +- drivers/clk/tegra/clk.h | 18 +- drivers/devfreq/Kconfig | 10 - drivers/devfreq/Makefile | 1 - drivers/devfreq/tegra20-devfreq.c | 210 --------- drivers/devfreq/tegra30-devfreq.c | 154 ++++--- drivers/gpu/drm/tegra/Kconfig | 1 + drivers/gpu/drm/tegra/dc.c | 359 +++++++++++++++ drivers/gpu/drm/tegra/dc.h | 19 + drivers/gpu/drm/tegra/drm.c | 14 + drivers/gpu/drm/tegra/hub.c | 3 + drivers/gpu/drm/tegra/plane.c | 121 +++++ drivers/gpu/drm/tegra/plane.h | 15 + drivers/memory/tegra/Kconfig | 5 +- drivers/memory/tegra/tegra124-emc.c | 382 ++++++++++++++-- drivers/memory/tegra/tegra124.c | 82 +++- drivers/memory/tegra/tegra30-emc.c | 349 ++++++++++++++- drivers/memory/tegra/tegra30.c | 173 +++++++- include/linux/clk/tegra.h | 8 + include/soc/tegra/emc.h | 16 - 39 files changed, 2699 insertions(+), 374 deletions(-) create mode 100644 arch/arm/boot/dts/tegra124-peripherals-opp.dtsi create mode 100644 arch/arm/boot/dts/tegra20-peripherals-opp.dtsi create mode 100644 arch/arm/boot/dts/tegra30-peripherals-opp.dtsi delete mode 100644 drivers/devfreq/tegra20-devfreq.c delete mode 100644 include/soc/tegra/emc.h -- 2.29.2