Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp3207995pxb; Mon, 16 Nov 2020 08:27:16 -0800 (PST) X-Google-Smtp-Source: ABdhPJwUXqBL/71xOShxqOib/8x4wVXi67wTaZFAtkSu96NYH1e9DMBSsbZzu/w2DQRgiAVmHF9V X-Received: by 2002:a17:906:4e41:: with SMTP id g1mr15894237ejw.47.1605544035813; Mon, 16 Nov 2020 08:27:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605544035; cv=none; d=google.com; s=arc-20160816; b=jjafW7mu6tqQ0zyZsAK3AOIw3iSwsgyO3T31kRkLGUaVNTf1ZHmbVeJVoxgzq9oyqi 5RDLRgX25YZLYnru9tmifnVMbp2dPyFs/ft1a6spceqS0Wjzyq3Eft8PY76Z7v5nrsI7 qrKK1K4mN08P1fBfy9zW06wIQOvx0b0T43odfUFwzMGeTdEqffoS7SMU6EWhZhX3DREb DLx65KwRpuJjKO2z8i+gSpBje82UMfj+9w37Zc10zvD2XHHT2Ozbsi+iwTqfEC8TcGpr Rfls929YEqjv3KK5IhVuY4aW5Mp+/bltCEmEF7TQCtRbitOfOUkpMTxJPbAez7eCSdAG RVLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=wHjl1c1ondwVcaYdzR+asNwG4ej5rTTw0YN2GWSCkKs=; b=Ve2VjWxcOao9/iG7ggI+jlGp9SB0XZBzHDcV4AGSk34lW7rATibQzRQD+TijWJxSop ql3sVR0xOi/kT6jb8eSe2bk4fpA8oTA9YCTu0cO5xQeOMuU9wAx2rd4PGZrvPbImwtCh NWClvnAasIwf5Z/EQPrpgQzBFFRDYSk+/dLEM0SAdMDNQRt9Ys3N4uCQCXx/IlfqX44e GiqciEeoYUzfuw4YUfTcekuxS4X2Rh2SnrCf11RRvFzXQNk69snZr/J3+OmP5zPLmOG3 +SjAacQlTF0Gr/wKGkFPcKZua/8MXTzrpolMdCoFBPPwGUAQVHtcoVSvNZrwq0YFMGWt K07A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r23si12329179eds.96.2020.11.16.08.26.52; Mon, 16 Nov 2020 08:27:15 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731978AbgKPQYi (ORCPT + 99 others); Mon, 16 Nov 2020 11:24:38 -0500 Received: from relay2-d.mail.gandi.net ([217.70.183.194]:51083 "EHLO relay2-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731971AbgKPQYi (ORCPT ); Mon, 16 Nov 2020 11:24:38 -0500 X-Originating-IP: 91.175.115.186 Received: from localhost (91-175-115-186.subs.proxad.net [91.175.115.186]) (Authenticated sender: gregory.clement@bootlin.com) by relay2-d.mail.gandi.net (Postfix) with ESMTPSA id 3C1EB40007; Mon, 16 Nov 2020 16:24:36 +0000 (UTC) From: Gregory CLEMENT To: Thomas Gleixner , Jason Cooper , Marc Zyngier , linux-kernel@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org Cc: Thomas Petazzoni , Alexandre Belloni , Lars Povlsen , , Gregory CLEMENT Subject: [PATCH v3 4/5] irqchip: ocelot: Add support for Serval platforms Date: Mon, 16 Nov 2020 17:24:26 +0100 Message-Id: <20201116162427.1727851-5-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201116162427.1727851-1-gregory.clement@bootlin.com> References: <20201116162427.1727851-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch extends irqchip driver for ocelot to be used with an other vcoreiii base platform: Serval. Based on a larger patch from Lars Povlsen Signed-off-by: Gregory CLEMENT --- drivers/irqchip/irq-mscc-ocelot.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/irqchip/irq-mscc-ocelot.c b/drivers/irqchip/irq-mscc-ocelot.c index 9964800c53c2..584af3b0a9e2 100644 --- a/drivers/irqchip/irq-mscc-ocelot.c +++ b/drivers/irqchip/irq-mscc-ocelot.c @@ -44,6 +44,18 @@ static const struct chip_props ocelot_props = { .n_irq = 24, }; +static const struct chip_props serval_props = { + .flags = FLAGS_HAS_TRIGGER, + .reg_off_sticky = 0xc, + .reg_off_ena = 0x14, + .reg_off_ena_clr = 0x18, + .reg_off_ena_set = 0x1c, + .reg_off_ident = 0x20, + .reg_off_trigger = 0x4, + .reg_off_force = 0x8, + .n_irq = 24, +}; + static const struct chip_props luton_props = { .flags = FLAGS_NEED_INIT_ENABLE | FLAGS_FORCE_LUTON_STYLE, @@ -210,6 +222,14 @@ static int __init ocelot_irq_init(struct device_node *node, IRQCHIP_DECLARE(ocelot_icpu, "mscc,ocelot-icpu-intr", ocelot_irq_init); +static int __init serval_irq_init(struct device_node *node, + struct device_node *parent) +{ + return vcoreiii_irq_init(node, parent, &serval_props); +} + +IRQCHIP_DECLARE(serval_icpu, "mscc,serval-icpu-intr", serval_irq_init); + static int __init luton_irq_init(struct device_node *node, struct device_node *parent) { -- 2.29.2