Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp3367948pxb; Mon, 16 Nov 2020 12:40:53 -0800 (PST) X-Google-Smtp-Source: ABdhPJxr13l1m7IkacH3fQwEa5lL6wY9JMFZUC+SerBkbJU5OIy7pbkJvO72ZUZg8COjKeEDrg4I X-Received: by 2002:a05:6402:1c84:: with SMTP id cy4mr17236445edb.382.1605559253547; Mon, 16 Nov 2020 12:40:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605559253; cv=none; d=google.com; s=arc-20160816; b=Y0FMziNtR1BeRUBkTBmUnCEVUWYjTnPfHeLp8Yxmp9xIrA9qlU5Iyw1+eg5S6qhQ4J NfAwGMZkDr4fqBHr20mBKu3sHZrV7SgWJO3OwSZVQw4BNowjzXj+pem57tzY39h4t3vi m0G0R5wln7H21nxbG1dscEN1p/41l6t2ETXnQGz2RJ0dwHGWKJYqxSy7tj8D5jORUAde 8HkAIBl9vCzSQnyi8MqzjytWvJjiGj6nXEoNrQUaD+FL4Zl5DahQSJT4UrKy0/5DMXvB 8aEq55+ikrrqn61/xJeK+UuVEA5bcK2GK/NSYvQVlySFPJhjSGMJ8LINRKnnbnj9Hh0x VTVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=RN0Veg8QmRqO0Cc1Aht9jl8LCxTIA7ETUgp1Edktqik=; b=TubLGJ9vZrezjRCw+vTfCIv/90e157CaKp2l5ndTfOuopfjHmzRybeHop3bL1s0PU1 n90tF9YhXiH9frUoV6XV5fZwynn+hMdTP61VbRF97prNtGR25h+xK2YAbS+nsF44FjIM hXvZHivn7+4sTZy1NrfhUjY3/iMxzitxLHpu4Cr/XiJ9jLtyt1JJYy0NdGnwffokrm6p zQuxzo2SIAhKZUpSecteZ0AjktbWsCOyMybE2ddcR2l8AZJbLN7IUiq5nkzj5Vptx+xp rgtFItkZTZlmYa9PAF6lRWyZJyiVu2KAzmaHTtgS5OeW9HkAZLXK4ryltAZOViuYGpc7 SAeA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org ([23.128.96.18]) by mx.google.com with ESMTP id ay1si12363776edb.326.2020.11.16.12.40.28; Mon, 16 Nov 2020 12:40:53 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731946AbgKPQYe (ORCPT + 99 others); Mon, 16 Nov 2020 11:24:34 -0500 Received: from relay6-d.mail.gandi.net ([217.70.183.198]:37175 "EHLO relay6-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730949AbgKPQYd (ORCPT ); Mon, 16 Nov 2020 11:24:33 -0500 X-Originating-IP: 91.175.115.186 Received: from localhost (91-175-115-186.subs.proxad.net [91.175.115.186]) (Authenticated sender: gregory.clement@bootlin.com) by relay6-d.mail.gandi.net (Postfix) with ESMTPSA id C1723C0012; Mon, 16 Nov 2020 16:24:30 +0000 (UTC) From: Gregory CLEMENT To: Thomas Gleixner , Jason Cooper , Marc Zyngier , linux-kernel@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org Cc: Thomas Petazzoni , Alexandre Belloni , Lars Povlsen , , Gregory CLEMENT Subject: [PATCH v3 0/5] Extend irqchip ocelot driver to support other SoCs Date: Mon, 16 Nov 2020 17:24:22 +0100 Message-Id: <20201116162427.1727851-1-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, Ocelot SoC belongs to a larger family of SoCs which use the same interrupt controller with a few variation. This series of patches add support for Luton, Serval and Jaguar2, they are all MIPS based. The first patches of the series also updates the binding documentation with the new compatible strings. Gregory Changelog: v2 -> v3 - Fix new-line-at-end-of-file error in the yaml file v1 -> v2: - Convert the binding to yaml - Squashed the patches adding new binding in a single one Gregory CLEMENT (5): dt-bindings: interrupt-controller: convert icpu intr bindings to json-schema dt-bindings: interrupt-controller: Add binding for few Microsemi interrupt controllers irqchip: ocelot: Add support for Luton platforms irqchip: ocelot: Add support for Serval platforms irqchip: ocelot: Add support for Jaguar2 platforms .../mscc,ocelot-icpu-intr.txt | 21 -- .../mscc,ocelot-icpu-intr.yaml | 63 ++++++ drivers/irqchip/irq-mscc-ocelot.c | 183 ++++++++++++++++-- 3 files changed, 225 insertions(+), 42 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml -- 2.29.2