Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp3371152pxb; Mon, 16 Nov 2020 12:47:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJyBGJcJOEq1PxlAPQx0aqwCae/n+fgZVP3vr6jrGvHL5gLENGoyXO4a4C+bxr479Ds9HtN7 X-Received: by 2002:a17:907:119e:: with SMTP id uz30mr16706641ejb.125.1605559623011; Mon, 16 Nov 2020 12:47:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605559623; cv=none; d=google.com; s=arc-20160816; b=Fwe5JMAG8RtyHROf3axP5XBmXQpkg8kMaw75CNxZrPlVoX3d0Tp1XWF059CF9nBJlC hlk+O/yNF+6RlVaVzUHzOyOoEZGT7Z7XAyOAu6fvOEDSYlmVX4MDrW2kIq9Rn6kvCMwe ElCUqdUbonXEjhLB4+Z5B+tIhTyTwwfF3Ie5tsknj6yTS0ljUTc/p3Y6KGNoe6uQGYsd PdIJgfC+BZ1drQ7Aop/iTzYXkqrK82vT/2vOtPO2y5YAosCbBNnTwt02DcaTqjrMTlrn sMSr6Vi9K0ownXROvGpu+NvN8o7Tbmo74RqAKIz0t1dvX9eW2KBH58fXYuxP3v1QKQD1 mfag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=4Kt1VSIlhcl9shYiLFtF8odU7vjy0AjT/VkOyWQEYJ4=; b=TTtTSQbHLOzw4xBI5CJgRuMF3xLCWE62D9KB0Xu0gcfKttIvAR/FKcesK1iKqByAtb tgCY3i/2ox3M3el+AjF1TYKjdh/jOKW68XWP/2UVDTkXDF4uIjHIpnWcPt805EMrjtAR yNITitV9OEpEeRJaMm9f7bWwX58JyC3C53gbhFFXDMkYL5R14RDl/ie4RhqNczDTJtza A2QbMqCxofFVuCCkwL+jt2abV8bZYNqEzYcEtXaJc5QJWXKJCedxpAH6Sez5Q0JjZG6V QJ2OtMviFOQIdqYZNsFqmQChOlMDJXa2hCQP9V+qec206jIZkLxXibcsMgomu3QzDkJn K4Gw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id e7si12383870edu.277.2020.11.16.12.46.40; Mon, 16 Nov 2020 12:47:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732661AbgKPRMX (ORCPT + 99 others); Mon, 16 Nov 2020 12:12:23 -0500 Received: from relay3-d.mail.gandi.net ([217.70.183.195]:37859 "EHLO relay3-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732620AbgKPRMX (ORCPT ); Mon, 16 Nov 2020 12:12:23 -0500 X-Originating-IP: 91.175.115.186 Received: from localhost (91-175-115-186.subs.proxad.net [91.175.115.186]) (Authenticated sender: gregory.clement@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id AD68960011; Mon, 16 Nov 2020 17:12:20 +0000 (UTC) From: Gregory CLEMENT To: Sebastian Reichel , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org Cc: Thomas Petazzoni , Alexandre Belloni , Lars Povlsen , , Gregory CLEMENT Subject: [PATCH 5/5] MIPS: dts: mscc: add reset support for Luton and Jaguar2 Date: Mon, 16 Nov 2020 18:11:59 +0100 Message-Id: <20201116171159.1735315-6-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201116171159.1735315-1-gregory.clement@bootlin.com> References: <20201116171159.1735315-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Allow Luton and Jaguar2 SoC to use reset feature by adding the reset node. Signed-off-by: Gregory CLEMENT --- arch/mips/boot/dts/mscc/jaguar2.dtsi | 6 ++++++ arch/mips/boot/dts/mscc/luton.dtsi | 5 +++++ 2 files changed, 11 insertions(+) diff --git a/arch/mips/boot/dts/mscc/jaguar2.dtsi b/arch/mips/boot/dts/mscc/jaguar2.dtsi index 42b2b0a51ddc..f5f7b81c4044 100644 --- a/arch/mips/boot/dts/mscc/jaguar2.dtsi +++ b/arch/mips/boot/dts/mscc/jaguar2.dtsi @@ -60,6 +60,12 @@ cpu_ctrl: syscon@70000000 { reg = <0x70000000 0x2c>; }; + reset@71010008 { + compatible = "mscc,luton-chip-reset"; + reg = <0x71010008 0x4>; + microchip,reset-switch-core; + }; + intc: interrupt-controller@70000070 { compatible = "mscc,jaguar2-icpu-intr"; reg = <0x70000070 0x94>; diff --git a/arch/mips/boot/dts/mscc/luton.dtsi b/arch/mips/boot/dts/mscc/luton.dtsi index 2a170b84c5a9..4a26c2874386 100644 --- a/arch/mips/boot/dts/mscc/luton.dtsi +++ b/arch/mips/boot/dts/mscc/luton.dtsi @@ -56,6 +56,11 @@ cpu_ctrl: syscon@10000000 { reg = <0x10000000 0x2c>; }; + reset@00070090 { + compatible = "mscc,luton-chip-reset"; + reg = <0x70090 0x4>; + }; + intc: interrupt-controller@10000084 { compatible = "mscc,luton-icpu-intr"; reg = <0x10000084 0x70>; -- 2.29.2