Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp144508pxb; Wed, 18 Nov 2020 00:09:36 -0800 (PST) X-Google-Smtp-Source: ABdhPJyRaQauQlTJqba7AsaG/39eUWiEAkWVTyhpqbZsnqKjjtYfAxtoPkj4/VqSCy30DbQJjXGf X-Received: by 2002:aa7:d6c2:: with SMTP id x2mr23816759edr.206.1605686976687; Wed, 18 Nov 2020 00:09:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605686976; cv=none; d=google.com; s=arc-20160816; b=LJPEJnGudvtdNpOMyHQ8PSGE5Uytyzik1aLGgkAsWdro6/JLPLmbrd3v6O+rcPqeLB KexhI/XWfOR3e6hw+lwmmIVBTUTq9toVOwOomXgQzxKx5F//L85iWQ7r3wYdScIXAWOC tFpjbRl3YUKI571sI2E2VT4+bMdLt0GBZQiEFNK2P3GfRdned5tfUE9IN2EOZ1u0oKb5 PE0/xQYL/gw+wij3QnYHEYpm65LTLeaiHHUeoNID/qG69kq69jQRnJiSOQ9+OsbqgDqs qK4HXzacM6kqj/soI9DXI2wt3ey3r2dETUrfYlslKtK9jkbevsmA/BPNnfktc1ovzfnF q+UQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:dkim-signature:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from; bh=aoJcYwi5/UenP9bLitxom4hRAg/DI2I1tYEOVWyMeuY=; b=YBKGnCt/AykVXuouGd3kcI5Ded01JFlKCV3o4XRutfLIo2KFOvSNhWw+jHMCd/4D3U Mf+67zf+oBgaKVhKki+A88K+GmCK0i+H5mVjFNabvXpZYh/BUrxmY5Uhd0fwJEC8uxpW 4eSF+v+yGjZRXMuax+uHMDAMlBjx+z7ukW6+zxtIuYaWtDsurI9339XjF749aVda1xYW DEZemLqsIP5IjR3rq0yU+sf10YAVCODVgRDeM3cSpKRPqcKb+DgZbCf8uQ7VsiRkDRNy zk61s5Z6dP/Ca1SrklLz9g5xCfU1L5d1AEv5lr1UNeR7JDAFMhJ4SvM4cU0h5yz1IxQG /bYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=mY8ZItWG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id o22si14512816ejb.569.2020.11.18.00.09.14; Wed, 18 Nov 2020 00:09:36 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=mY8ZItWG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727122AbgKRIGp (ORCPT + 99 others); Wed, 18 Nov 2020 03:06:45 -0500 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:12005 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726935AbgKRIGm (ORCPT ); Wed, 18 Nov 2020 03:06:42 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Wed, 18 Nov 2020 00:06:31 -0800 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 18 Nov 2020 08:06:40 +0000 Received: from audio.nvidia.com (172.20.13.39) by mail.nvidia.com (172.20.187.13) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Wed, 18 Nov 2020 08:06:38 +0000 From: Sameer Pujar To: , , CC: , , , , , , Sameer Pujar Subject: [PATCH 2/3] dt-bindings: tegra: Convert HDA doc to json-schema Date: Wed, 18 Nov 2020 13:36:21 +0530 Message-ID: <1605686782-29469-3-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605686782-29469-1-git-send-email-spujar@nvidia.com> References: <1605686782-29469-1-git-send-email-spujar@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1605686791; bh=aoJcYwi5/UenP9bLitxom4hRAg/DI2I1tYEOVWyMeuY=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:MIME-Version:Content-Type; b=mY8ZItWGAP8elYufCNd5Da4m3C0jLMu3TUT4NZZ5gFwbs69X2J6nsxOaDAkCDHZet t0XkD16DGDNCoQ9JLY9QRff4VAkLekBCyEg247QccWeqG/jGu9BLtzuOJuZp8Wauwl OHwKJCQ2U6j9plHPXuYjCv5PqNQIey0lA0ziJxvpgsslAlsO65lK8cGLhd6s2eb6x4 uA4ypVrUvviaIvL7+m5xx5445OKu9rOdVQlDi3AcIRMceORHDW3Q1YUsYASraTzKu4 PJrMAvvEyN+4TSTeQRG7xC5ptVDzT/Eaex2fFq05v1SZHqYOqvL1Qg0KFcJ147qi38 BdL2BFMv+l/Uw== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert Tegra HDA doc to YAML format. Signed-off-by: Sameer Pujar --- .../bindings/sound/nvidia,tegra30-hda.txt | 35 -------- .../bindings/sound/nvidia,tegra30-hda.yaml | 98 ++++++++++++++++++++++ 2 files changed, 98 insertions(+), 35 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt deleted file mode 100644 index 21cd310..0000000 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt +++ /dev/null @@ -1,35 +0,0 @@ -NVIDIA Tegra30 HDA controller - -Required properties: -- compatible : For Tegra30, must contain "nvidia,tegra30-hda". Otherwise, - must contain '"nvidia,-hda", "nvidia,tegra30-hda"', where is - tegra114, tegra124, or tegra132. -- reg : Should contain the HDA registers location and length. -- interrupts : The interrupt from the HDA controller. -- clocks : Must contain an entry for each required entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x - -Optional properties: -- nvidia,model : The user-visible name of this sound complex. Since the property - is optional, legacy boards can use default name provided in hda driver. - -Example: - -hda@70030000 { - compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda"; - reg = <0x0 0x70030000 0x0 0x10000>; - interrupts = ; - clocks = <&tegra_car TEGRA124_CLK_HDA>, - <&tegra_car TEGRA124_CLK_HDA2HDMI>, - <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; - clock-names = "hda", "hda2hdmi", "hda2codec_2x"; - resets = <&tegra_car 125>, /* hda */ - <&tegra_car 128>, /* hda2hdmi */ - <&tegra_car 111>; /* hda2codec_2x */ - reset-names = "hda", "hda2hdmi", "hda2codec_2x"; - nvidia,model = "jetson-tk1-hda"; -}; diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml new file mode 100644 index 0000000..3059bc3 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/nvidia,tegra30-hda.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra HDA controller + +description: | + The High Definition Audio (HDA) block provides a serial interface to + audio codec. It supports multiple input and output streams. + +maintainers: + - Thierry Reding + - Jon Hunter + +properties: + $nodename: + pattern: "^hda@[0-9a-f]*$" + + compatible: + oneOf: + - const: nvidia,tegra30-hda + - items: + - enum: + - nvidia,tegra194-hda + - nvidia,tegra186-hda + - nvidia,tegra210-hda + - nvidia,tegra124-hda + - const: nvidia,tegra30-hda + - items: + - const: nvidia,tegra132-hda + - const: nvidia,tegra124-hda + - const: nvidia,tegra30-hda + + reg: + maxItems: 1 + + interrupts: + description: The interrupt from the HDA controller + maxItems: 1 + + clocks: + maxItems: 3 + + clock-names: + maxItems: 3 + items: + - const: hda + - const: hda2hdmi + - const: hda2codec_2x + + resets: + maxItems: 3 + + reset-names: + maxItems: 3 + items: + - const: hda + - const: hda2hdmi + - const: hda2codec_2x + + nvidia,model: + $ref: /schemas/types.yaml#/definitions/string + description: | + The user-visible name of this sound complex. If this property is + not specified then boards can use default name provided in hda driver. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + + hda@70030000 { + compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda"; + reg = <0x70030000 0x10000>; + interrupts = ; + clocks = <&tegra_car TEGRA124_CLK_HDA>, + <&tegra_car TEGRA124_CLK_HDA2HDMI>, + <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; + clock-names = "hda", "hda2hdmi", "hda2codec_2x"; + resets = <&tegra_car 125>, /* hda */ + <&tegra_car 128>, /* hda2hdmi */ + <&tegra_car 111>; /* hda2codec_2x */ + reset-names = "hda", "hda2hdmi", "hda2codec_2x"; + nvidia,model = "jetson-tk1-hda"; + }; + +... -- 2.7.4