Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Date:   Thu, 19 Nov 2020 08:15:23 +0100
From:   Maxime Ripard <maxime@cerno.tech>
To:     Wilken Gottwalt <wilken.gottwalt@posteo.net>
Cc:     linux-kernel@vger.kernel.org, Ohad Ben-Cohen <ohad@wizery.com>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Baolin Wang <baolin.wang7@gmail.com>,
        Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
        Jernej Skrabec <jernej.skrabec@siol.net>
Subject: Re: [PATCH 2/2] hwspinlock: add sunxi hardware spinlock support
Message-ID: <20201119071523.5cbpgy2cpo5cmuev@gilmour.lan>
References: <cover.1605693132.git.wilken.gottwalt@posteo.net>
 <149526a0ba8d18ebb68baa24e95d946ede90b4c0.1605693132.git.wilken.gottwalt@posteo.net>
 <20201118153733.jgiokn6jkwu6rv6c@gilmour.lan>
 <20201118203624.7221ba8b@monster.powergraphx.local>
MIME-Version: 1.0
Content-Type: multipart/signed; micalg=pgp-sha256;
        protocol="application/pgp-signature"; boundary="yffm423zihwi5zdg"
Content-Disposition: inline
In-Reply-To: <20201118203624.7221ba8b@monster.powergraphx.local>
Precedence: bulk


--yffm423zihwi5zdg
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable

On Wed, Nov 18, 2020 at 08:36:24PM +0100, Wilken Gottwalt wrote:
> On Wed, 18 Nov 2020 16:37:33 +0100
> Maxime Ripard <maxime@cerno.tech> wrote:
> > Hi Wilken,
> >=20
> > On Wed, Nov 18, 2020 at 11:02:40AM +0100, Wilken Gottwalt wrote:
> > > Adds the sunxi_hwspinlock driver and updates makefiles/maintainers.
> > >=20
> > > Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
> >=20
> > A more descriptive commit log would be welcome here, for example
> > containing on which SoC this driver can be used, and on which it was
> > tested.
>=20
> can you help me here a bit? I still try to figure out how to do patch sets
> properly. Some kernel submitting documentation says everything goes into =
the
> coverletter and other documentation only tells how to split the patches. =
So
> what would be the right way? A quick example based on my patch set would =
be
> really helpful.

I mean, the split between your patches and so on is good, you got that right

The thing I wanted better details on is the commit log itself, so the
message attached to that patch.

> > This is the third attempt at that driver, and you can find the previous
> > versions here:
> > https://patchwork.kernel.org/project/linux-arm-kernel/cover/20200210170=
143.20007-1-nborisov@suse.com/
> > https://lore.kernel.org/patchwork/patch/706512/
> >=20
> > Most of the comments on those series still apply to yours.
>=20
> Oh, I wrote my driver 2-3 years ago and just prepared it for mainline. I
> wasn't aware of other attempts. I really should have checked this. Though,
> I really want to get to the point where this driver is good enough for
> mainline. Hmmm, it is interesting how similar these drivers are. Looks li=
ke
> the other developers also got inspired by the already existing hwspinlock
> drivers. :D

Yeah, it looks like you all got the same inspiration :)

> > Most importantly, this hwspinlock is used to synchronize the ARM cores
> > and the ARISC. How did you test this driver?
>=20
> Yes, you are right, I should have mentioned this. I have a simple test ke=
rnel
> module for this. But I must admit, testing the ARISC is very hard and I h=
ave
> no real idea how to do it. Testing the hwspinlocks in general seems to wo=
rk
> with my test kernel module, but I'm not sure if this is really sufficient=
=2E I
> can provide the code for it if you like. What would be the best way? Gith=
ub?
> Just mailing a patch?
>=20
> The test module produces these results:
>=20
> # insmod /lib/modules/5.9.8/kernel/drivers/hwspinlock/sunxi_hwspinlock_te=
st.ko=20
> [   45.395672] [init] sunxi hwspinlock test driver start
> [   45.400775] [init] start test locks
> [   45.404263] [run ] testing 32 locks
> [   45.407804] [test] testing lock 0 -----
> [   45.411652] [test] taking lock attempt #0 succeded
> [   45.416438] [test] try taken lock attempt #0
> [   45.420735] [test] unlock/take attempt #0
> [   45.424752] [test] taking lock attempt #1 succeded
> [   45.429556] [test] try taken lock attempt #1
> [   45.433823] [test] unlock/take attempt #1
> [   45.437862] [test] testing lock 1 -----
> [   45.441699] [test] taking lock attempt #0 succeded
> [   45.446484] [test] try taken lock attempt #0
> [   45.450768] [test] unlock/take attempt #0
> [   45.454774] [test] taking lock attempt #1 succeded
> [   45.459576] [test] try taken lock attempt #1
> [   45.463843] [test] unlock/take attempt #1
> .
> .
> .
> [   46.309925] [test] testing lock 30 -----
> [   46.313852] [test] taking lock attempt #0 succeded
> [   46.318654] [test] try taken lock attempt #0
> [   46.322920] [test] unlock/take attempt #0
> [   46.326944] [test] taking lock attempt #1 succeded
> [   46.331729] [test] try taken lock attempt #1
> [   46.335994] [test] unlock/take attempt #1
> [   46.340021] [test] testing lock 31 -----
> [   46.343947] [test] taking lock attempt #0 succeded
> [   46.348749] [test] try taken lock attempt #0
> [   46.353016] [test] unlock/take attempt #0
> [   46.357040] [test] taking lock attempt #1 succeded
> [   46.361825] [test] try taken lock attempt #1
> [   46.366090] [test] unlock/take attempt #1
> [   46.370112] [init] end test locks

That doesn't really test for contention though, and dealing with
contention is mostly what this hardware is about. Could you make a small
test with crust to see if when the arisc has taken the lock, the ARM
cores can't take it?

Maxime

--yffm423zihwi5zdg
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCX7YbiwAKCRDj7w1vZxhR
xdXCAPsFBDsW3OHbhbbI7loRjGxv7uBsvLF7Jq40jw6ghi4k2QEAns3rMbeYvoYF
8qGfZklCDZTF45RlndqxO0I+yHIXLQc=
=4ZUC
-----END PGP SIGNATURE-----

--yffm423zihwi5zdg--