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[23.128.96.18]) by mx.google.com with ESMTP id q15si18144300edr.58.2020.11.19.00.57.16; Thu, 19 Nov 2020 00:57:39 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=XEmt4HKJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726820AbgKSIyf (ORCPT + 99 others); Thu, 19 Nov 2020 03:54:35 -0500 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:6216 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726666AbgKSIye (ORCPT ); Thu, 19 Nov 2020 03:54:34 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Thu, 19 Nov 2020 00:54:37 -0800 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 19 Nov 2020 08:54:31 +0000 Received: from jckuo-lt.nvidia.com (10.124.1.5) by mail.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Thu, 19 Nov 2020 08:54:29 +0000 From: JC Kuo To: , , , , CC: , , , , , JC Kuo Subject: [PATCH v5 10/16] dt-bindings: phy: tegra-xusb: Add nvidia,pmc prop Date: Thu, 19 Nov 2020 16:53:59 +0800 Message-ID: <20201119085405.556138-11-jckuo@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201119085405.556138-1-jckuo@nvidia.com> References: <20201119085405.556138-1-jckuo@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1605776078; bh=/25Z1zzMaL8p7xwbvJ82Qyyi/mNswl6YKDmpc3+Tezc=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=XEmt4HKJyGYwQHzbWke2MFGU/SlGsCpn1c2n4OV6AgwYvKNOghGX9Baj4HO78o3sN 1pl2sZOAGoIvg15wefbbCCLBwuhhCF4mcoWQxa6gllvub7DVYuS5f/qU8z50M0JsMf 3pJdZpeoYvzp9c7VIHgbL7uq+Z6YrZiA/rGu5WiAgGHERCz05FQog5dYejpHvW5cp6 UzgBtTf32sGgYz1j0QLa7D2eX5pkl93EiGsuLTL2DpVt9cBXGhX0IJrU5ioICGD6CS RRh12n0u6xp45gQ7u9/W3Iua7T2C+v0l0kSqpTbjK4YpATzijbiJkpnF2kF6FLgSl4 Y9VnyxMvlHhCA== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This commit describes the "nvidia,pmc" property for Tegra210 tegra-xusb PHY driver. It is a phandle and specifier referring to the Tegra210 pmc@7000e400 node. Signed-off-by: JC Kuo --- v5: replace "pmc@7000e400 node" -> with "PMC node" v4: new change to document "nvidia,pmc" prop .../devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-pad= ctl.txt b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl= .txt index 38c5fa21f435..b62397d2bb0c 100644 --- a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt +++ b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt @@ -54,6 +54,7 @@ For Tegra210: - avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.0= 5 V. - dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V. - hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V= . +- nvidia,pmc: phandle and specifier referring to the Tegra210 PMC node. =20 For Tegra186: - avdd-pll-erefeut-supply: UPHY brick and reference clock as well as UTMI = PHY --=20 2.25.1