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From:   Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To:     Geert Uytterhoeven <geert+renesas@glider.be>,
        Linus Walleij <linus.walleij@linaro.org>,
        linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org
Cc:     linux-kernel@vger.kernel.org,
        Biju Das <biju.das.jz@bp.renesas.com>,
        Prabhakar <prabhakar.csengg@gmail.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 0/4] Renesas add QSPI{0,1} pins to r8a77{96,951,965,990} SoC
Date:   Thu, 19 Nov 2020 13:09:22 +0000
Message-Id: <20201119130926.25692-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Precedence: bulk

Hi All,

This patch series adds QSPI{0,1} pins to r8a77{96,951,965,990} SoC.

Patches are based on top of [1].

[1]  https://git.kernel.org/pub/scm/linux/kernel/git/geert/
     renesas-drivers.git/log/?h=renesas-pinctrl-for-v5.11
Cheers,
Prabhakar

Lad Prabhakar (4):
  pinctrl: renesas: r8a77990: Add QSPI[01] pins, groups and functions
  pinctrl: renesas: r8a77951: Add QSPI[01] pins, groups and functions
  pinctrl: renesas: r8a7796: Add QSPI[01] pins, groups and functions
  pinctrl: renesas: r8a77965: Add QSPI[01] pins, groups and functions

 drivers/pinctrl/renesas/pfc-r8a77951.c | 75 +++++++++++++++++++++++++-
 drivers/pinctrl/renesas/pfc-r8a7796.c  | 75 +++++++++++++++++++++++++-
 drivers/pinctrl/renesas/pfc-r8a77965.c | 75 +++++++++++++++++++++++++-
 drivers/pinctrl/renesas/pfc-r8a77990.c | 75 +++++++++++++++++++++++++-
 4 files changed, 292 insertions(+), 8 deletions(-)

-- 
2.17.1