Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp919601pxb; Thu, 19 Nov 2020 17:54:00 -0800 (PST) X-Google-Smtp-Source: ABdhPJxDmxqv32MCPM8k65LH4+0HeyJHaby8PzMHYyMGVdU+h3M4vPjwsLgiruGsJPZAi9ZZ3ZYo X-Received: by 2002:a05:6402:1c1c:: with SMTP id ck28mr267723edb.336.1605837240453; Thu, 19 Nov 2020 17:54:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605837240; cv=none; d=google.com; s=arc-20160816; b=Q8j2RkgErt44NlXl2JOCI/4EYc9DKCotVRAJsBYyoG6l+j3qsSlQiS8SrFcK3/Yoxg mzn63LMS9YhbNyW/GMWFteZbkuVzuyQ5Ch/TV3NEEzaLNFNB8epqKym7Pznuhsrgy/LR cQCql4bHvzwRqPeos70gPmEgT3jedZgaGkUHyyLaOSBgN/9ll4Hh9NzDLBw6oBgP1Hzp MGTGCBfLxEI0urpJOgeT3w8BLCVBa6NUOatrNXkHBJWcn2mhOKVcw1jidjpZ4cRgtkO3 usD54Q1Zlyx8U7N9vqIflKNCwKRKFgrolWwJ9FuQsJiPy6UdPrFaW0poh0BwhSNEAwMs EqdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=cfcKgV7gAB+oVUTmWrRNQLofHVIByn5HhgTst/hId74=; b=zUEN9snBGeIY0tvJm/qENzSa5HSECa0/5UvtGBoIjnbU5iQxR1hbHQV/BlAI236fjR r80wxJF6o5xyBpMJ9Ow/dC4ZvyCaHKJJcB2c4OQk9Y7z33UgA3P2k/P7Dfh710KndQnH zgFubHvz6S+OgXccAxRITH37R1RPRYEmnoBK+A0gMzemaLMX+PmgMCMAbjBVmQczCjAB +vG1ZoVrdYxFSVrbursRgDPcgbKEToP8Qp96VLXrBLDXa24vwbzc4p9HZUEDXMC6CzEW DPHrXkkutXB7H12JWg6xBb9M2SmK6siArtEvWc+0/zh7kkqfwk0nXZdEVZeC3vBy2IVK seeQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g24si967413edj.168.2020.11.19.17.53.36; Thu, 19 Nov 2020 17:54:00 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727246AbgKTBtY (ORCPT + 99 others); Thu, 19 Nov 2020 20:49:24 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:40302 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726504AbgKTBtY (ORCPT ); Thu, 19 Nov 2020 20:49:24 -0500 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kfvY7-0082oq-Go; Fri, 20 Nov 2020 02:49:19 +0100 Date: Fri, 20 Nov 2020 02:49:19 +0100 From: Andrew Lunn To: Dan Murphy Cc: davem@davemloft.net, f.fainelli@gmail.com, hkallweit1@gmail.com, robh@kernel.org, ciorneiioana@gmail.com, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next v4 4/4] net: phy: dp83td510: Add support for the DP83TD510 Ethernet PHY Message-ID: <20201120014919.GB1804098@lunn.ch> References: <20201117201555.26723-1-dmurphy@ti.com> <20201117201555.26723-5-dmurphy@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201117201555.26723-5-dmurphy@ti.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > +static int dp83td510_config_init(struct phy_device *phydev) > +{ > + struct dp83td510_private *dp83td510 = phydev->priv; > + int ret = 0; > + > + if (phy_interface_is_rgmii(phydev)) { > + if (dp83td510->rgmii_delay) { > + ret = phy_set_bits_mmd(phydev, DP83TD510_DEVADDR, > + DP83TD510_MAC_CFG_1, > + dp83td510->rgmii_delay); Just to be safe, you should always write rgmii_delay, even if it is zero. We have had too many bugs with RGMII delays which cause bad backwards compatibility problems, so i would prefer to do a write which might be unneeded, that find a bug here in a few years time. > + if (ret) > + return ret; > + } > + } > + > + if (phydev->interface == PHY_INTERFACE_MODE_RMII) { > + ret = phy_modify(phydev, DP83TD510_GEN_CFG, > + DP83TD510_FIFO_DEPTH_MASK, > + dp83td510->tx_fifo_depth); So there is no need to set the FIFO depth for the other three RGMII modes? Or should this also be phy_interface_is_rgmii(phydev)? > +#if IS_ENABLED(CONFIG_OF_MDIO) > +static int dp83td510_of_init(struct phy_device *phydev) > +{ > + struct dp83td510_private *dp83td510 = phydev->priv; > + struct device *dev = &phydev->mdio.dev; > + struct device_node *of_node = dev->of_node; You need to move this assignment to later in order to keep with reverse christmas tree. > +#else > +static int dp83869_of_init(struct phy_device *phydev) > +{ > + dp83td510->hi_diff_output = DP83TD510_2_4V_P2P > + dp83td510->tx_fifo_depth = DP83TD510_FIFO_DEPTH_5_B_NIB You don't have DT, so there is no fine control, but you still need to do the basic 2ns delay as indicated by the phydev->interface value. So i think you still need to set dp83td510->rgmii_delay depending on which RGMII mode is requested. Andrew