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References: <20201119130926.25692-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20201119130926.25692-2-prabhakar.mahadev-lad.rj@bp.renesas.com>
In-Reply-To: <20201119130926.25692-2-prabhakar.mahadev-lad.rj@bp.renesas.com>
From:   Geert Uytterhoeven <geert@linux-m68k.org>
Date:   Fri, 20 Nov 2020 10:19:49 +0100
Message-ID: <CAMuHMdUGqkqZVY9YZ1Xo=uq_4kn3ybh50VMSNBCLOSKWyDd3kw@mail.gmail.com>
Subject: Re: [PATCH 1/4] pinctrl: renesas: r8a77990: Add QSPI[01] pins, groups
 and functions
To:     Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc:     Linus Walleij <linus.walleij@linaro.org>,
        Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Biju Das <biju.das.jz@bp.renesas.com>,
        Prabhakar <prabhakar.csengg@gmail.com>
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Precedence: bulk

On Thu, Nov 19, 2020 at 2:09 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Add pins, groups and functions for QSPIO[01].
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-pinctrl-for-v5.11...

> --- a/drivers/pinctrl/renesas/pfc-r8a77990.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
> @@ -2810,6 +2810,57 @@ static const unsigned int pwm6_b_mux[] = {
>         PWM6_B_MARK,
>  };
>
> +/* - QSPI0 ------------------------------------------------------------------ */
> +static const unsigned int qspi0_ctrl_pins[] = {
> +       /* SPCLK, SSL */

... with the missing QSPI0_ prefix added...

> +       RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 5),
> +};
> +static const unsigned int qspi0_ctrl_mux[] = {
> +       QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
> +};
> +static const unsigned int qspi0_data2_pins[] = {
> +       /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
> +       RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2),
> +};
> +static const unsigned int qspi0_data2_mux[] = {
> +       QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
> +};
> +static const unsigned int qspi0_data4_pins[] = {
> +       /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
> +       RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2),
> +       /*  QSPI0_IO2, QSPI0_IO3 */

... and the bogus space dropped.

> +       RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4),
> +};

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds