Received: by 2002:a05:6a10:16a7:0:0:0:0 with SMTP id gp39csp1897035pxb; Sat, 21 Nov 2020 01:53:53 -0800 (PST) X-Google-Smtp-Source: ABdhPJxAfzX9uQg2BSbbGzOmDoDYm/k2ql/FLXGYG3QvZkkC3OuWPyQjxYECZFqFkDuQa7ULaE07 X-Received: by 2002:a05:6402:1284:: with SMTP id w4mr15028336edv.324.1605952433673; Sat, 21 Nov 2020 01:53:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605952433; cv=none; d=google.com; s=arc-20160816; b=XEkmMfcI0NvpXG+fSnKzOTA/UeEk8VY/R9DCU2lK1JManoy43NtUvQZmT25ffilncd cRIEZAlTZozMgRiovihB7Sw0cA3BSSWniaauagl0alQsLsXh+ACor2N1tei8KqoOSaY4 nPsiO4QWJ2rY3RCw5PatgcF2L8U6roqXMEzvQJUdGNuy17bU65kyckgd4T6avxCLpCBk 4q06wV8BblXfJdnCrUNrrnodK9KYHCkqTmtPDIXsiwJZsBEYnCJm2m4WtkEXqV7nJj2x cCvWlorGZ/WBByAC/1E0g1IqK2X1AU4VLCzp9DSYYr6ey7JxU5LQbME0NkBMQS/kQRhL D04w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=uFyys8n3oox6pqNY/VbC/rBJ11HkKFVOVGFT+WgYeTE=; b=06YsH1+z+crLlixWKTAGuqZmFxjOY4YtJdOH6tfn8rV4JnFPCwjt2toDIPo97QUoq3 wT7zjosZMwi/ZJXTb9tRvx8Y8KZRz+Pum6TQ4eTdq5S8yeHHog29OlirWIHy0GLMykLn d0SEUs/YrMxyAW1h0pPaAUXAAti6eoGBQnku8j1EWNpYwGSgc9rcUAxKoRr7u6DwXFhq qKjlLOz2OzTwcEmJg2Axa0VU6+om6O4sXO6UQ+KOVVPTFG5eybYo6S3VCPp7zBGdCCMB WFFG7PLO26iVi5fDqsJS5JCL0kfOw9oX/OeNX6t0f8kFmMf2D9EKIKNizEFnKH1MH28o NfMA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j27si3241515eje.30.2020.11.21.01.53.30; Sat, 21 Nov 2020 01:53:53 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727424AbgKUJvc (ORCPT + 99 others); Sat, 21 Nov 2020 04:51:32 -0500 Received: from smtp05.smtpout.orange.fr ([80.12.242.127]:45550 "EHLO smtp.smtpout.orange.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726629AbgKUJvb (ORCPT ); Sat, 21 Nov 2020 04:51:31 -0500 Received: from localhost.localdomain ([81.185.161.242]) by mwinf5d61 with ME id uxrS230045E5lq903xrSLm; Sat, 21 Nov 2020 10:51:27 +0100 X-ME-Helo: localhost.localdomain X-ME-Auth: Y2hyaXN0b3BoZS5qYWlsbGV0QHdhbmFkb28uZnI= X-ME-Date: Sat, 21 Nov 2020 10:51:27 +0100 X-ME-IP: 81.185.161.242 From: Christophe JAILLET To: dennis.dalessandro@cornelisnetworks.com, mike.marciniszyn@cornelisnetworks.com, dledford@redhat.com, jgg@ziepe.ca Cc: linux-rdma@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-janitors@vger.kernel.org, Christophe JAILLET Subject: [PATCH] IB/qib: Use dma_set_mask_and_coherent to simplify code Date: Sat, 21 Nov 2020 10:51:27 +0100 Message-Id: <20201121095127.1335228-1-christophe.jaillet@wanadoo.fr> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 'pci_set_dma_mask()' + 'pci_set_consistent_dma_mask()' can be replaced by an equivalent 'dma_set_mask_and_coherent()' which is much less verbose. Signed-off-by: Christophe JAILLET --- drivers/infiniband/hw/qib/qib_pcie.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c index 3dc6ce033319..2e07b3749b88 100644 --- a/drivers/infiniband/hw/qib/qib_pcie.c +++ b/drivers/infiniband/hw/qib/qib_pcie.c @@ -90,25 +90,18 @@ int qib_pcie_init(struct pci_dev *pdev, const struct pci_device_id *ent) goto bail; } - ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); if (ret) { /* * If the 64 bit setup fails, try 32 bit. Some systems * do not setup 64 bit maps on systems with 2GB or less * memory installed. */ - ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); if (ret) { qib_devinfo(pdev, "Unable to set DMA mask: %d\n", ret); goto bail; } - ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); - } else - ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); - if (ret) { - qib_early_err(&pdev->dev, - "Unable to set DMA consistent mask: %d\n", ret); - goto bail; } pci_set_master(pdev); -- 2.27.0