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From:   Aryan Srivastava <aryan.srivastava@alliedtelesis.co.nz>
To:     robh+dt@kernel.org, andrew@lunn.ch, gregory.clement@bootlin.com,
        sebastian.hesselbarth@gmail.com, chrisp@alliedtelesis.co.nz
Cc:     devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        Aryan Srivastava <aryan.srivastava@alliedtelesis.co.nz>
Subject: [PATCH] ARM: dts: mvebu: Add device tree for RD-AC3X-48G4X2XL board
Date:   Mon, 23 Nov 2020 16:52:15 +1300
Message-Id: <20201123035215.2239-1-aryan.srivastava@alliedtelesis.co.nz>
MIME-Version: 1.0
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Add device tree for RD-AC3X-48G4X2XL board. This has a Armada 382 SoC on
a interposer board connected to a baseboard with a Prestera AC3X ASIC
connected via PCI.

Signed-off-by: Aryan Srivastava <aryan.srivastava@alliedtelesis.co.nz>
---
 arch/arm/boot/dts/Makefile                    |   1 +
 .../boot/dts/armada-382-rd-ac3x-48g4x2xl.dts  | 114 ++++++++++++++++++
 2 files changed, 115 insertions(+)
 create mode 100644 arch/arm/boot/dts/armada-382-rd-ac3x-48g4x2xl.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index ce66ffd5a1bb..a60407ad7347 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1319,6 +1319,7 @@ dtb-$(CONFIG_MACH_ARMADA_370) +=3D \
 dtb-$(CONFIG_MACH_ARMADA_375) +=3D \
 	armada-375-db.dtb
 dtb-$(CONFIG_MACH_ARMADA_38X) +=3D \
+	armada-382-rd-ac3x-48g4x2xl.dtb \
 	armada-385-clearfog-gtr-s4.dtb \
 	armada-385-clearfog-gtr-l8.dtb \
 	armada-385-db-88f6820-amc.dtb \
diff --git a/arch/arm/boot/dts/armada-382-rd-ac3x-48g4x2xl.dts b/arch/arm=
/boot/dts/armada-382-rd-ac3x-48g4x2xl.dts
new file mode 100644
index 000000000000..b08d662a8519
--- /dev/null
+++ b/arch/arm/boot/dts/armada-382-rd-ac3x-48g4x2xl.dts
@@ -0,0 +1,114 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Device Tree file for Marvell Armada 382 reference board
+ * (RD-AC3X-48G4X2XL)
+ *
+ * Copyright (C) 2020 Allied Telesis Labs
+ */
+
+/dts-v1/;
+#include "armada-385.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model =3D "Marvell Armada 382 RD-AC3X";
+	compatible =3D "marvell,rd-ac3x-48g4x2xl", "marvell,rd-ac3x",
+			 "marvell,armada385", "marvell,armada380";
+
+	chosen {
+		stdout-path =3D "serial0:115200n8";
+	};
+
+	aliases {
+		ethernet0 =3D &eth1;
+	};
+
+	memory {
+		device_type =3D "memory";
+		reg =3D <0x00000000 0x20000000>; /* 512MB */
+	};
+
+	soc {
+		ranges =3D <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
+	};
+};
+
+&i2c0 {
+	pinctrl-names =3D "default";
+	pinctrl-0 =3D <&i2c0_pins>;
+	status =3D "okay";
+
+	eeprom@53{
+		compatible =3D "atmel,24c64";
+		reg =3D <0x53>;
+	};
+//	cpld@3c{
+//		compatible =3D "marvell,ac3x-cpld";
+//		reg =3D <0x3c>;
+//	};
+};
+
+&uart0 {
+	pinctrl-names =3D "default";
+	pinctrl-0 =3D <&uart0_pins>;
+	status =3D "okay";
+};
+
+&eth1 {
+	status =3D "okay";
+	phy =3D <&phy0>;
+	phy-mode =3D "rgmii-id";
+};
+
+&mdio {
+	pinctrl-names =3D "default";
+	pinctrl-0 =3D <&mdio_pins>;
+
+	phy0: ethernet-phy@0 {
+		reg =3D <0>;
+	};
+};
+
+&pciec {
+	status =3D "okay";
+};
+
+&pcie1 {
+	/* Port 0, Lane 0 */
+	status =3D "okay";
+};
+
+&nand_controller {
+	status =3D "okay";
+
+	nand@0 {
+		reg =3D <0>;
+		label =3D "pxa3xx_nand-0";
+		nand-rb =3D <0>;
+		nand-on-flash-bbt;
+
+		partitions {
+			compatible =3D "fixed-partitions";
+			#address-cells =3D <1>;
+			#size-cells =3D <1>;
+			partition@0 {
+				reg =3D <0x00000000 0x00500000>;
+				label =3D "u-boot";
+			};
+			partition@500000{
+				reg =3D <0x00500000 0x00400000>;
+				label =3D "u-boot env";
+			};
+			partition@900000{
+				reg =3D <0x00900000 0x3F700000>;
+				label =3D "user";
+			};
+		};
+	};
+};
+
+&refclk {
+	clock-frequency =3D <200000000>;
+};
--=20
2.29.2