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[23.128.96.18]) by mx.google.com with ESMTP id p1si2511697ejx.531.2020.11.23.08.11.25; Mon, 23 Nov 2020 08:11:49 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Npylciof; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389886AbgKWQHg (ORCPT + 99 others); Mon, 23 Nov 2020 11:07:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33110 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730059AbgKWQHg (ORCPT ); Mon, 23 Nov 2020 11:07:36 -0500 Received: from mail-vk1-xa43.google.com (mail-vk1-xa43.google.com [IPv6:2607:f8b0:4864:20::a43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 232D2C0613CF for ; Mon, 23 Nov 2020 08:07:36 -0800 (PST) Received: by mail-vk1-xa43.google.com with SMTP id w190so2231040vkg.13 for ; Mon, 23 Nov 2020 08:07:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=erW0XIM+2y9def48xOpIc4QdS/vND+3STJwJE9GzrvM=; b=NpylciofEhMTaLNdbM9e1geQueViMrm5kQlxx0uBp9N20vNsPQ0MItUfE46rsSwk7u 8zw+2Daf22S1TPyrUA44QJskC0ltQVAadvRihxTvO2RS/jyJOdmwDEPQZlny1uARVT+o JTjp6WxOiNcj53fPMYHi4ZUL+IqdrOV1xDDzF6ZWkPPG4y/5pnOnIhyNJ08z5juS3qxB UiZqpb5KOm6S+FzbPVkF29sMKBfbSj8246AclN3e2BTpDxz0lUuI7/dkYZvj3cC2wp88 yg4mFV2ORDKYktD33FA/mgnUvMfD/W+kPHfOqYc93ARJL/Fz/WO8ZBMHOBp3fB9X6W5e BwGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=erW0XIM+2y9def48xOpIc4QdS/vND+3STJwJE9GzrvM=; b=ZWGVveaOzSAebyMylBRPdp3CIb+rgnpQzVvMILcIPOnzuHzwUdIyEtOM8DuP0YaHZA BTXHG7lrb+w9Ud9clYJbUhUQOjpCxk+NZxFlZG+lKO5ltzTdJkTmQ83afCC5k47VXYIH Gqqd7LgfZjmLUkouaKIqFiFCwUwmmhkhMX5qS+QONjf37VsStRNrznZFL6V0oVFQVf3S Vz1MTiVsNIIIE4DWpAYKwRYP8DzdbC9S9/UWelGsND+filCsaHwfqEYLdAezqmUR8rqy ybJ2MTopomt3OV9q89mnY46Es3KnTPxfy/dDCNZ+uwMkvp4z635vHasn+F/De4z9kauW IFfg== X-Gm-Message-State: AOAM531ZUmpvSFDUyOKn3vQWm1R7ZTrFlouGGxnlWUKWGSspAQNj+m1Y HNJc3TDJpIS5ldbKdrsPQTK7fxFeN405a913HNSPDQ== X-Received: by 2002:a1f:8f48:: with SMTP id r69mr430105vkd.6.1606147655157; Mon, 23 Nov 2020 08:07:35 -0800 (PST) MIME-Version: 1.0 References: <20201119030237.9414-1-yong.mao@mediatek.com> In-Reply-To: <20201119030237.9414-1-yong.mao@mediatek.com> From: Ulf Hansson Date: Mon, 23 Nov 2020 17:06:57 +0100 Message-ID: Subject: Re: [PATCH V1] mmc: mediatek: correct the setting of recheck_sdio_irq To: Yong Mao Cc: Chaotian Jing , Matthias Brugger , "linux-mmc@vger.kernel.org" , Linux ARM , "moderated list:ARM/Mediatek SoC support" , Linux Kernel Mailing List , srv_heupstream , Fabien Parent , Mattijs Korpershoek Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org + Fabien, Mattijs On Thu, 19 Nov 2020 at 04:03, Yong Mao wrote: > > From: yong mao > > correct the setting of recheck_sdio_irq for each mediatek SoC. > > Signed-off-by: Yong Mao Applied for fixes, by adding a fixes+stable tags and reported-by tags from Fabien and Mattijs, thanks! Kind regards Uffe > --- > drivers/mmc/host/mtk-sd.c | 11 ++++++----- > 1 file changed, 6 insertions(+), 5 deletions(-) > > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c > index fc5ee5df91ad..d49e5ccfca9e 100644 > --- a/drivers/mmc/host/mtk-sd.c > +++ b/drivers/mmc/host/mtk-sd.c > @@ -463,7 +463,7 @@ struct msdc_host { > > static const struct mtk_mmc_compatible mt8135_compat = { > .clk_div_bits = 8, > - .recheck_sdio_irq = false, > + .recheck_sdio_irq = true, > .hs400_tune = false, > .pad_tune_reg = MSDC_PAD_TUNE, > .async_fifo = false, > @@ -502,7 +502,7 @@ static const struct mtk_mmc_compatible mt8183_compat = { > > static const struct mtk_mmc_compatible mt2701_compat = { > .clk_div_bits = 12, > - .recheck_sdio_irq = false, > + .recheck_sdio_irq = true, > .hs400_tune = false, > .pad_tune_reg = MSDC_PAD_TUNE0, > .async_fifo = true, > @@ -528,7 +528,7 @@ static const struct mtk_mmc_compatible mt2712_compat = { > > static const struct mtk_mmc_compatible mt7622_compat = { > .clk_div_bits = 12, > - .recheck_sdio_irq = false, > + .recheck_sdio_irq = true, > .hs400_tune = false, > .pad_tune_reg = MSDC_PAD_TUNE0, > .async_fifo = true, > @@ -541,7 +541,7 @@ static const struct mtk_mmc_compatible mt7622_compat = { > > static const struct mtk_mmc_compatible mt8516_compat = { > .clk_div_bits = 12, > - .recheck_sdio_irq = false, > + .recheck_sdio_irq = true, > .hs400_tune = false, > .pad_tune_reg = MSDC_PAD_TUNE0, > .async_fifo = true, > @@ -552,7 +552,7 @@ static const struct mtk_mmc_compatible mt8516_compat = { > > static const struct mtk_mmc_compatible mt7620_compat = { > .clk_div_bits = 8, > - .recheck_sdio_irq = false, > + .recheck_sdio_irq = true, > .hs400_tune = false, > .pad_tune_reg = MSDC_PAD_TUNE, > .async_fifo = false, > @@ -565,6 +565,7 @@ static const struct mtk_mmc_compatible mt7620_compat = { > > static const struct mtk_mmc_compatible mt6779_compat = { > .clk_div_bits = 12, > + .recheck_sdio_irq = false, > .hs400_tune = false, > .pad_tune_reg = MSDC_PAD_TUNE0, > .async_fifo = true, > -- > 2.18.0 >